d/numam-dpdk
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

crypto/qat: remove atomics

Browse Source 
Replacing atomics in the QAT driver with simple 16-bit integers for
number of inflight packets.

This adds a new limitation to the QAT driver: each queue pair is
now explicitly single-threaded.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
This commit is contained in:
Anatoly Burakov 2017-09-12 10:31:16 +01:00 committed by Pablo de Lara
parent 6fcd9fdf37
commit 0a081a5fd2
5 changed files with 15 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
doc/guides/cryptodevs/qat.rst
View File

@ -90,6 +90,7 @@ Limitations
* No BSD support as BSD QAT kernel driver not available.
* ZUC EEA3/EIA3 is not supported by dh895xcc devices
* Maximum additional authenticated data (AAD) for GCM is 240 bytes long.
* Queue pairs are not thread-safe (that is, within a single queue pair, RX and TX from different lcores is not supported).
Installation

6
doc/guides/rel_notes/release_17_11.rst
View File

@ -81,6 +81,12 @@ New Features
* Support for Flow API
* Support for Tx and Rx descriptor status functions
* **Updated QAT crypto PMD.**
Performance enhancements:
* Removed atomics from the internal queue pair structure.
* **Added IOMMU support to libvhost-user**
Implemented device IOTLB in Vhost-user backend, and enabled Virtio's IOMMU

12
drivers/crypto/qat/qat_crypto.c
View File

@ -51,7 +51,6 @@
#include <rte_eal.h>
#include <rte_per_lcore.h>
#include <rte_lcore.h>
#include <rte_atomic.h>
#include <rte_branch_prediction.h>
#include <rte_mempool.h>
#include <rte_mbuf.h>
@ -945,10 +944,10 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
tail = queue->tail;
/* Find how many can actually fit on the ring */
overflow = rte_atomic16_add_return(&tmp_qp->inflights16, nb_ops)
- queue->max_inflights;
tmp_qp->inflights16 += nb_ops;
overflow = tmp_qp->inflights16 - queue->max_inflights;
if (overflow > 0) {
rte_atomic16_sub(&tmp_qp->inflights16, overflow);
tmp_qp->inflights16 -= overflow;
nb_ops_possible = nb_ops - overflow;
if (nb_ops_possible == 0)
return 0;
@ -963,8 +962,7 @@ qat_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
* This message cannot be enqueued,
* decrease number of ops that wasn't sent
*/
rte_atomic16_sub(&tmp_qp->inflights16,
nb_ops_possible - nb_ops_sent);
tmp_qp->inflights16 -= nb_ops_possible - nb_ops_sent;
if (nb_ops_sent == 0)
return 0;
goto kick_tail;
@ -1036,7 +1034,7 @@ qat_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
WRITE_CSR_RING_HEAD(tmp_qp->mmap_bar_addr,
queue->hw_bundle_number,
queue->hw_queue_number, queue->head);
rte_atomic16_sub(&tmp_qp->inflights16, msg_counter);
tmp_qp->inflights16 -= msg_counter;
tmp_qp->stats.dequeued_count += msg_counter;
}
return msg_counter;

2
drivers/crypto/qat/qat_crypto.h
View File

@ -77,7 +77,7 @@ struct qat_queue {
struct qat_qp {
void *mmap_bar_addr;
rte_atomic16_t inflights16;
uint16_t inflights16;
struct qat_queue tx_q;
struct qat_queue rx_q;
struct rte_cryptodev_stats stats;

4
drivers/crypto/qat/qat_qp.c
View File

@ -181,7 +181,7 @@ int qat_crypto_sym_qp_setup(struct rte_cryptodev *dev, uint16_t queue_pair_id,
RTE_CACHE_LINE_SIZE);
qp->mmap_bar_addr = pci_dev->mem_resource[0].addr;
rte_atomic16_init(&qp->inflights16);
qp->inflights16 = 0;
if (qat_tx_queue_create(dev, &(qp->tx_q),
queue_pair_id, qp_conf->nb_descriptors, socket_id) != 0) {
@ -264,7 +264,7 @@ int qat_crypto_sym_qp_release(struct rte_cryptodev *dev, uint16_t queue_pair_id)
}
/* Don't free memory if there are still responses to be processed */
if (rte_atomic16_read(&(qp->inflights16)) == 0) {
if (qp->inflights16 == 0) {
qat_queue_delete(&(qp->tx_q));
qat_queue_delete(&(qp->rx_q));
} else {