net/ice/base: fix a couple of casting
Adjust variable size between u8 and u16 to fix casting issues Also fix couple coding style issues Karol Kolacinski <karol.kolacinski@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com>
This commit is contained in:
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@ -682,7 +682,7 @@ struct ice_aqc_recipe_content {
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#define ICE_AQ_RECIPE_ID_S 0
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#define ICE_AQ_RECIPE_ID_M (0x3F << ICE_AQ_RECIPE_ID_S)
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#define ICE_AQ_RECIPE_ID_IS_ROOT BIT(7)
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#define ICE_AQ_SW_ID_LKUP_IDX 0
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#define ICE_AQ_SW_ID_LKUP_IDX 0
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u8 lkup_indx[5];
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#define ICE_AQ_RECIPE_LKUP_DATA_S 0
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#define ICE_AQ_RECIPE_LKUP_DATA_M (0x3F << ICE_AQ_RECIPE_LKUP_DATA_S)
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@ -813,7 +813,7 @@ struct ice_sw_rule_lkup_rx_tx {
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#define ICE_SINGLE_ACT_OTHER_ACTS 0x3
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#define ICE_SINGLE_OTHER_ACT_IDENTIFIER_S 17
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#define ICE_SINGLE_OTHER_ACT_IDENTIFIER_M \
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(0x3 << \ ICE_SINGLE_OTHER_ACT_IDENTIFIER_S)
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(0x3 << ICE_SINGLE_OTHER_ACT_IDENTIFIER_S)
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/* Bit 17:18 - Defines other actions */
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/* Other action = 0 - Mirror VSI */
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@ -2118,9 +2118,7 @@ struct ice_aqc_move_txqs {
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__le32 addr_low;
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};
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/* This is the descriptor of each queue entry for the move Tx LAN Queues
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* command (0x0C32).
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*/
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/* Per-queue data buffer for the Move Tx LAN Queues command/response */
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struct ice_aqc_move_txqs_elem {
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__le16 txq_id;
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u8 q_cgd;
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@ -2128,6 +2126,7 @@ struct ice_aqc_move_txqs_elem {
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__le32 q_teid;
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};
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/* Indirect data buffer for the Move Tx LAN Queues command/response */
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struct ice_aqc_move_txqs_data {
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__le32 src_teid;
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__le32 dest_teid;
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@ -4004,7 +4004,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
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* This function adds/updates the VSI queues per TC.
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*/
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static enum ice_status
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ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
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u16 *maxqs, u8 owner)
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{
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enum ice_status status = ICE_SUCCESS;
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@ -4043,7 +4043,7 @@ ice_cfg_vsi_qs(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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* This function adds/updates the VSI LAN queues per TC.
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*/
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enum ice_status
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
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u16 *max_lanqs)
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{
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return ice_cfg_vsi_qs(pi, vsi_handle, tc_bitmap, max_lanqs,
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@ -188,7 +188,7 @@ ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
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enum ice_disq_rst_src rst_src, u16 vmvf_num,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
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u16 *max_lanqs);
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enum ice_status
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ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
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@ -624,18 +624,18 @@ static enum ice_status ice_init_ctrlq(struct ice_hw *hw, enum ice_ctl_q q_type)
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*/
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enum ice_status ice_init_all_ctrlq(struct ice_hw *hw)
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{
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enum ice_status ret_code;
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enum ice_status status;
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ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__);
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/* Init FW admin queue */
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ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN);
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if (ret_code)
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return ret_code;
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status = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN);
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if (status)
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return status;
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ret_code = ice_init_check_adminq(hw);
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if (ret_code)
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return ret_code;
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status = ice_init_check_adminq(hw);
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if (status)
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return status;
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/* Init Mailbox queue */
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return ice_init_ctrlq(hw, ICE_CTL_Q_MAILBOX);
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}
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@ -832,7 +832,7 @@ static void ice_debug_cq(struct ice_hw *hw, void *desc, void *buf, u16 buf_len)
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flags & ICE_AQ_FLAG_RD)) {
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ice_debug(hw, ICE_DBG_AQ_DESC_BUF, "Buffer:\n");
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ice_debug_array(hw, ICE_DBG_AQ_DESC_BUF, 16, 1, (u8 *)buf,
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min(buf_len, datalen));
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MIN_T(u16, buf_len, datalen));
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}
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}
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@ -1140,7 +1140,7 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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}
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ice_memcpy(&e->desc, desc, sizeof(e->desc), ICE_DMA_TO_NONDMA);
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datalen = LE16_TO_CPU(desc->datalen);
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e->msg_len = min(datalen, e->buf_len);
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e->msg_len = MIN_T(u16, datalen, e->buf_len);
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if (e->msg_buf && e->msg_len)
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ice_memcpy(e->msg_buf, cq->rq.r.rq_bi[desc_idx].va,
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e->msg_len, ICE_DMA_TO_NONDMA);
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@ -1562,7 +1562,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type req_profs,
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* allocated for every list entry.
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*/
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enum ice_status
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ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u16 ids_cnt,
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ice_get_sw_fv_list(struct ice_hw *hw, u8 *prot_ids, u16 ids_cnt,
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ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
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{
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struct ice_sw_fv_list_entry *fvl;
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@ -1963,7 +1963,7 @@ ice_create_tunnel(struct ice_hw *hw, enum ice_tunnel_type type, u16 port)
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*/
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ice_set_key((u8 *)§_rx->tcam[0].key, sizeof(sect_rx->tcam[0].key),
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(u8 *)&port, NULL, NULL, NULL,
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offsetof(struct ice_boost_key_value, hv_dst_port_key),
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(u16)offsetof(struct ice_boost_key_value, hv_dst_port_key),
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sizeof(sect_rx->tcam[0].key.key.hv_dst_port_key));
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/* exact copy of entry to Tx section entry */
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@ -2011,7 +2011,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
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return ICE_ERR_PARAM;
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/* size of section - there is at least one entry */
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size = (count - 1) * sizeof(*sect_rx->tcam) + sizeof(*sect_rx);
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size = ice_struct_size(sect_rx, tcam, count - 1);
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bld = ice_pkg_buf_alloc(hw);
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if (!bld)
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@ -2078,7 +2078,7 @@ enum ice_status ice_destroy_tunnel(struct ice_hw *hw, u16 port, bool all)
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* @off: variable to receive the protocol offset
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*/
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enum ice_status
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ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx,
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ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
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u8 *prot, u16 *off)
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{
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struct ice_fv_word *fv_ext;
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@ -2680,9 +2680,9 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk,
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struct ice_fv_word *fv, u16 *masks, u8 *prof_id)
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{
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struct ice_es *es = &hw->blk[blk].es;
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u16 i;
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u8 i;
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for (i = 0; i < es->count; i++) {
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for (i = 0; i < (u8)es->count; i++) {
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u16 off = i * es->fvw;
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if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv)))
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@ -4464,7 +4464,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
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struct ice_prof_map *prof;
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enum ice_status status;
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u32 byte = 0;
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u8 byte = 0;
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u8 prof_id;
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ice_zero_bitmap(ptgs_used, ICE_XLT1_CNT);
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@ -4513,7 +4513,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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/* build list of ptgs */
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while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) {
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u32 bit;
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u8 bit;
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if (!ptypes[byte]) {
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bytes--;
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@ -4562,7 +4562,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[],
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}
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/* nothing left in byte, then exit */
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m = ~((1 << (bit + 1)) - 1);
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m = ~(u8)((1 << (bit + 1)) - 1);
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if (!(ptypes[byte] & m))
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break;
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}
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@ -5335,8 +5335,10 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl,
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t->tcam[i].ptg, vsig, 0,
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t->tcam[i].attr.flags, vl_msk,
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dc_msk, nm_msk);
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if (status)
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if (status) {
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ice_free(hw, p);
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goto err_ice_add_prof_id_vsig;
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}
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/* log change */
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LIST_ADD(&p->list_entry, chg);
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@ -25,7 +25,7 @@ enum ice_status
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ice_acquire_change_lock(struct ice_hw *hw, enum ice_aq_res_access_type access);
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void ice_release_change_lock(struct ice_hw *hw);
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enum ice_status
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ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx,
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ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 fv_idx,
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u8 *prot, u16 *off);
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enum ice_status
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ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type,
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@ -36,7 +36,7 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type,
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void
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ice_init_prof_result_bm(struct ice_hw *hw);
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enum ice_status
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ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u16 ids_cnt,
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ice_get_sw_fv_list(struct ice_hw *hw, u8 *prot_ids, u16 ids_cnt,
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ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list);
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bool
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ice_get_open_tunnel_port(struct ice_hw *hw, enum ice_tunnel_type type,
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@ -623,8 +623,9 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
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struct ice_aqc_recipe_data_elem *tmp;
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u16 num_recps = ICE_MAX_NUM_RECIPES;
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struct ice_prot_lkup_ext *lkup_exts;
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u16 i, sub_recps, fv_word_idx = 0;
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enum ice_status status;
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u8 fv_word_idx = 0;
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u16 sub_recps;
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ice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS);
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@ -662,7 +663,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
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for (sub_recps = 0; sub_recps < num_recps; sub_recps++) {
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struct ice_aqc_recipe_data_elem root_bufs = tmp[sub_recps];
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struct ice_recp_grp_entry *rg_entry;
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u8 prof, idx, prot = 0;
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u8 i, prof, idx, prot = 0;
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bool is_root;
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u16 off = 0;
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@ -718,7 +719,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid,
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LIST_ADD(&rg_entry->l_entry, &recps[rid].rg_list);
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/* Propagate some data to the recipe database */
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recps[idx].is_root = is_root;
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recps[idx].is_root = !!is_root;
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recps[idx].priority = root_bufs.content.act_ctrl_fwd_priority;
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ice_zero_bitmap(recps[idx].res_idxs, ICE_MAX_FV_WORDS);
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if (root_bufs.content.result_indx & ICE_AQ_RECIPE_RESULT_EN) {
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@ -1842,10 +1843,10 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw)
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{
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struct ice_aqc_get_sw_cfg_resp *rbuf;
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enum ice_status status;
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u16 num_total_ports;
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u8 num_total_ports;
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u16 req_desc = 0;
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u16 num_elems;
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u16 j = 0;
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u8 j = 0;
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u16 i;
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num_total_ports = 1;
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@ -3124,11 +3125,11 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
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struct ice_aqc_sw_rules_elem *s_rule, *r_iter;
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struct ice_fltr_list_entry *m_list_itr;
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struct LIST_HEAD_TYPE *rule_head;
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u16 elem_sent, total_elem_left;
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u16 total_elem_left, s_rule_size;
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struct ice_lock *rule_lock; /* Lock to protect filter rule list */
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enum ice_status status = ICE_SUCCESS;
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u16 num_unicast = 0;
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u16 s_rule_size;
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u8 elem_sent;
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s_rule = NULL;
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rule_lock = &recp_list->filt_rule_lock;
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@ -3210,8 +3211,8 @@ ice_add_mac_rule(struct ice_hw *hw, struct LIST_HEAD_TYPE *m_list,
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total_elem_left -= elem_sent) {
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struct ice_aqc_sw_rules_elem *entry = r_iter;
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elem_sent = min(total_elem_left,
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(u16)(ICE_AQ_MAX_BUF_LEN / s_rule_size));
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elem_sent = MIN_T(u8, total_elem_left,
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(ICE_AQ_MAX_BUF_LEN / s_rule_size));
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status = ice_aq_sw_rules(hw, entry, elem_sent * s_rule_size,
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elem_sent, ice_aqc_opc_add_sw_rules,
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NULL);
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@ -4943,7 +4944,7 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts)
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{
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bool refresh_required = true;
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struct ice_sw_recipe *recp;
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u16 i;
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u8 i;
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/* Walk through existing recipes to find a match */
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recp = hw->switch_info->recp_list;
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@ -5009,9 +5010,9 @@ static u16 ice_find_recp(struct ice_hw *hw, struct ice_prot_lkup_ext *lkup_exts)
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*
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* Returns true if found, false otherwise
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*/
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static bool ice_prot_type_to_id(enum ice_protocol_type type, u16 *id)
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static bool ice_prot_type_to_id(enum ice_protocol_type type, u8 *id)
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{
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u16 i;
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u8 i;
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for (i = 0; i < ARRAY_SIZE(ice_prot_id_tbl); i++)
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if (ice_prot_id_tbl[i].type == type) {
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@ -5028,13 +5029,11 @@ static bool ice_prot_type_to_id(enum ice_protocol_type type, u16 *id)
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*
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* calculate valid words in a lookup rule using mask value
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*/
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static u16
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static u8
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ice_fill_valid_words(struct ice_adv_lkup_elem *rule,
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struct ice_prot_lkup_ext *lkup_exts)
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{
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u16 j, word = 0;
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u16 prot_id;
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u16 ret_val;
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u8 j, word, prot_id, ret_val;
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if (!ice_prot_type_to_id(rule->type, &prot_id))
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return 0;
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@ -5043,7 +5042,7 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule,
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for (j = 0; j < sizeof(rule->m_u) / sizeof(u16); j++)
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if (((u16 *)&rule->m_u)[j] &&
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(unsigned long)rule->type < ARRAY_SIZE(ice_prot_ext)) {
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rule->type < ARRAY_SIZE(ice_prot_ext)) {
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/* No more space to accommodate */
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if (word >= ICE_MAX_CHAIN_WORDS)
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return 0;
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@ -5612,10 +5611,10 @@ ice_get_fv(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, u16 lkups_cnt,
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ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list)
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{
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enum ice_status status;
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u16 *prot_ids;
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u8 *prot_ids;
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u16 i;
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prot_ids = (u16 *)ice_calloc(hw, lkups_cnt, sizeof(*prot_ids));
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prot_ids = (u8 *)ice_calloc(hw, lkups_cnt, sizeof(*prot_ids));
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if (!prot_ids)
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return ICE_ERR_NO_MEMORY;
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@ -5791,7 +5790,7 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
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match_tun = true;
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/* set the recipe priority if specified */
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rm->priority = rinfo->priority ? rinfo->priority : 0;
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rm->priority = (u8)rinfo->priority;
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/* Find offsets from the field vector. Pick the first one for all the
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* recipes.
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@ -6197,7 +6196,7 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,
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*/
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static struct ice_adv_fltr_mgmt_list_entry *
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ice_find_adv_rule_entry(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,
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u16 lkups_cnt, u8 recp_id,
|
||||
u16 lkups_cnt, u16 recp_id,
|
||||
struct ice_adv_rule_info *rinfo)
|
||||
{
|
||||
struct ice_adv_fltr_mgmt_list_entry *list_itr;
|
||||
|
@ -786,8 +786,8 @@ struct ice_hw {
|
||||
u16 max_burst_size; /* driver sets this value */
|
||||
|
||||
/* Tx Scheduler values */
|
||||
u16 num_tx_sched_layers;
|
||||
u16 num_tx_sched_phys_layers;
|
||||
u8 num_tx_sched_layers;
|
||||
u8 num_tx_sched_phys_layers;
|
||||
u8 flattened_layers;
|
||||
u8 max_cgds;
|
||||
u8 sw_entry_point_layer;
|
||||
|
Loading…
Reference in New Issue
Block a user