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net/qede/base: add support for 2x10G mode

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Add support for 2x10G mode

Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
This commit is contained in:
Rasesh Mody 2017-01-04 23:04:01 -08:00 committed by Ferruh Yigit
parent 05a1abcdfc
commit 0b46a4e6ae
4 changed files with 7 additions and 1 deletions
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2
doc/guides/nics/qede.rst
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@ -32,7 +32,7 @@ QEDE Poll Mode Driver
====================== ======================
The QEDE poll mode driver library (**librte_pmd_qede**) implements support The QEDE poll mode driver library (**librte_pmd_qede**) implements support
for **QLogic FastLinQ QL4xxxx 25G/40G/100G CNA** family of adapters as well for **QLogic FastLinQ QL4xxxx 10G/25G/40G/100G CNA** family of adapters as well
as their virtual functions (VF) in SR-IOV context. It is supported on as their virtual functions (VF) in SR-IOV context. It is supported on
several standard Linux distros like RHEL7.x, SLES12.x and Ubuntu. several standard Linux distros like RHEL7.x, SLES12.x and Ubuntu.
It is compile-tested under FreeBSD OS. It is compile-tested under FreeBSD OS.

1
drivers/net/qede/base/ecore.h
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@ -302,6 +302,7 @@ enum ecore_port_mode {
ECORE_PORT_MODE_DE_2X25G, ECORE_PORT_MODE_DE_2X25G,
ECORE_PORT_MODE_DE_1X25G, ECORE_PORT_MODE_DE_1X25G,
ECORE_PORT_MODE_DE_4X25G, ECORE_PORT_MODE_DE_4X25G,
ECORE_PORT_MODE_DE_2X10G,
}; };
enum ecore_dev_cap { enum ecore_dev_cap {

3
drivers/net/qede/base/ecore_dev.c
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@ -2474,6 +2474,9 @@ static enum _ecore_status_t ecore_hw_get_nvm_info(struct ecore_hwfn *p_hwfn,
case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G: case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G:
p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_2X25G; p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_2X25G;
break; break;
case NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G:
p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_2X10G;
break;
case NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G: case NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G:
p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_1X25G; p_hwfn->hw_info.port_mode = ECORE_PORT_MODE_DE_1X25G;
break; break;

2
drivers/net/qede/base/nvm_cfg.h
View File

@ -144,6 +144,7 @@ struct nvm_cfg1_glob {
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G 0xC #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X25G 0xC
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G 0xD #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_1X25G 0xD
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_4X25G 0xE #define NVM_CFG1_GLOB_NETWORK_PORT_MODE_4X25G 0xE
#define NVM_CFG1_GLOB_NETWORK_PORT_MODE_2X10G 0xF
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_MASK 0x00000100 #define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_MASK 0x00000100
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_OFFSET 8 #define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_OFFSET 8
#define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_DISABLED 0x0 #define NVM_CFG1_GLOB_MPS10_ENFORCE_TX_FIR_CFG_DISABLED 0x0
@ -578,6 +579,7 @@ struct nvm_cfg1_glob {
#define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_2X50G 0x40 #define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_2X50G 0x40
#define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_BB_1X100G \ #define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_BB_1X100G \
0x80 0x80
#define NVM_CFG1_GLOB_MULTI_NETWORK_MODES_CAPABILITY_2X10G 0x100
u32 reserved[41]; /* 0x9C */ u32 reserved[41]; /* 0x9C */
}; };