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net/ice/base: support 64-bit read

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Add function support for rd64.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This commit is contained in:
Leyi Rong 2019-06-19 23:18:10 +08:00 committed by Ferruh Yigit
parent 3940540c5d
commit 0c80804082
1 changed files with 9 additions and 0 deletions
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9
drivers/net/ice/base/ice_osdep.h
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@ -126,11 +126,19 @@ do { \
#define ICE_PCI_REG(reg) rte_read32(reg)
#define ICE_PCI_REG_ADDR(a, reg) \
((volatile uint32_t *)((char *)(a)->hw_addr + (reg)))
#define ICE_PCI_REG64(reg) rte_read64(reg)
#define ICE_PCI_REG_ADDR64(a, reg) \
((volatile uint64_t *)((char *)(a)->hw_addr + (reg)))
static inline uint32_t ice_read_addr(volatile void *addr)
{
return rte_le_to_cpu_32(ICE_PCI_REG(addr));
}
static inline uint64_t ice_read_addr64(volatile void *addr)
{
return rte_le_to_cpu_64(ICE_PCI_REG64(addr));
}
#define ICE_PCI_REG_WRITE(reg, value) \
rte_write32((rte_cpu_to_le_32(value)), reg)
@ -145,6 +153,7 @@ static inline uint32_t ice_read_addr(volatile void *addr)
ICE_PCI_REG_WRITE(ICE_PCI_REG_ADDR((a), (reg)), (value))
#define flush(a) ice_read_addr(ICE_PCI_REG_ADDR((a), (GLGEN_STAT)))
#define div64_long(n, d) ((n) / (d))
#define rd64(a, reg) ice_read_addr64(ICE_PCI_REG_ADDR64((a), (reg)))
#define BITS_PER_BYTE 8