dpaa: prepare for 32-bit build
This patch prepares the dpaa drivers for compilation on 32 bit machine. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
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aecb435131
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0e5607e4ad
@ -300,7 +300,7 @@ fman_if_init(const struct device_node *dpa_node)
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_errno = fman_get_mac_index(regs_addr_host, &__if->__if.mac_idx);
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if (_errno) {
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FMAN_ERR(-EINVAL, "Invalid register address: %lu",
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FMAN_ERR(-EINVAL, "Invalid register address: %" PRIx64,
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regs_addr_host);
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goto err;
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}
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@ -161,7 +161,7 @@ int bman_init_ccsr(const struct device_node *node)
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PROT_WRITE, MAP_SHARED, ccsr_map_fd, phys_addr);
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if (bman_ccsr_map == MAP_FAILED) {
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pr_err("Can not map BMan CCSR base Bman: "
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"0x%x Phys: 0x%lx size 0x%lx",
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"0x%x Phys: 0x%" PRIx64 " size 0x%" PRIu64,
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*bman_addr, phys_addr, regs_size);
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return -EINVAL;
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}
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@ -19,7 +19,6 @@
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#include <rte_interrupts.h>
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#include <rte_log.h>
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#include <rte_debug.h>
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#include <rte_pci.h>
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#include <rte_atomic.h>
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#include <rte_branch_prediction.h>
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#include <rte_memory.h>
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@ -235,7 +234,7 @@ int rte_dpaa_portal_init(void *arg)
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BUS_INIT_FUNC_TRACE();
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if ((uint64_t)arg == 1 || cpu == LCORE_ID_ANY)
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if ((size_t)arg == 1 || cpu == LCORE_ID_ANY)
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cpu = rte_get_master_lcore();
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/* if the core id is not supported */
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else
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@ -84,7 +84,7 @@ dpaa_sec_alloc_ctx(dpaa_sec_session *ses)
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dcbz_64(&ctx->job.sg[SG_CACHELINE_3]);
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ctx->ctx_pool = ses->ctx_pool;
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ctx->vtop_offset = (uint64_t) ctx
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ctx->vtop_offset = (size_t) ctx
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- rte_mempool_virt2iova(ctx);
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return ctx;
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@ -97,7 +97,7 @@ dpaa_mem_vtop(void *vaddr)
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uint64_t vaddr_64, paddr;
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int i;
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vaddr_64 = (uint64_t)vaddr;
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vaddr_64 = (size_t)vaddr;
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for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
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if (vaddr_64 >= memseg[i].addr_64 &&
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vaddr_64 < memseg[i].addr_64 + memseg[i].len) {
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@ -107,14 +107,14 @@ dpaa_mem_vtop(void *vaddr)
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return (rte_iova_t)paddr;
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}
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}
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return (rte_iova_t)(NULL);
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return (size_t)NULL;
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}
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/* virtual address conversin when mempool support is available for ctx */
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static inline phys_addr_t
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dpaa_mem_vtop_ctx(struct dpaa_sec_op_ctx *ctx, void *vaddr)
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{
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return (uint64_t)vaddr - ctx->vtop_offset;
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return (size_t)vaddr - ctx->vtop_offset;
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}
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static inline void *
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@ -125,8 +125,8 @@ dpaa_mem_ptov(rte_iova_t paddr)
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for (i = 0; i < RTE_MAX_MEMSEG && memseg[i].addr_64 != 0; i++) {
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if (paddr >= memseg[i].iova &&
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(char *)paddr < (char *)memseg[i].iova + memseg[i].len)
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return (void *)(memseg[i].addr_64 +
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paddr < memseg[i].iova + memseg[i].len)
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return (void *)(size_t)(memseg[i].addr_64 +
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(paddr - memseg[i].iova));
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}
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return NULL;
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@ -406,7 +406,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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return -ENOTSUP;
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}
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alginfo_c.key = (uint64_t)ses->cipher_key.data;
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alginfo_c.key = (size_t)ses->cipher_key.data;
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alginfo_c.keylen = ses->cipher_key.length;
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alginfo_c.key_enc_flags = 0;
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alginfo_c.key_type = RTA_DATA_IMM;
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@ -424,7 +424,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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return -ENOTSUP;
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}
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alginfo_a.key = (uint64_t)ses->auth_key.data;
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alginfo_a.key = (size_t)ses->auth_key.data;
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alginfo_a.keylen = ses->auth_key.length;
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alginfo_a.key_enc_flags = 0;
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alginfo_a.key_type = RTA_DATA_IMM;
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@ -439,7 +439,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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PMD_TX_LOG(ERR, "not supported aead alg\n");
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return -ENOTSUP;
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}
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alginfo.key = (uint64_t)ses->aead_key.data;
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alginfo.key = (size_t)ses->aead_key.data;
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alginfo.keylen = ses->aead_key.length;
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alginfo.key_enc_flags = 0;
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alginfo.key_type = RTA_DATA_IMM;
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@ -463,7 +463,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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return -ENOTSUP;
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}
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alginfo_c.key = (uint64_t)ses->cipher_key.data;
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alginfo_c.key = (size_t)ses->cipher_key.data;
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alginfo_c.keylen = ses->cipher_key.length;
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alginfo_c.key_enc_flags = 0;
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alginfo_c.key_type = RTA_DATA_IMM;
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@ -474,7 +474,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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return -ENOTSUP;
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}
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alginfo_a.key = (uint64_t)ses->auth_key.data;
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alginfo_a.key = (size_t)ses->auth_key.data;
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alginfo_a.keylen = ses->auth_key.length;
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alginfo_a.key_enc_flags = 0;
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alginfo_a.key_type = RTA_DATA_IMM;
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@ -493,15 +493,15 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
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if (cdb->sh_desc[2] & 1)
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alginfo_c.key_type = RTA_DATA_IMM;
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else {
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alginfo_c.key = (uint64_t)dpaa_mem_vtop(
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(void *)alginfo_c.key);
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alginfo_c.key = (size_t)dpaa_mem_vtop(
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(void *)(size_t)alginfo_c.key);
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alginfo_c.key_type = RTA_DATA_PTR;
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}
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if (cdb->sh_desc[2] & (1<<1))
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alginfo_a.key_type = RTA_DATA_IMM;
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else {
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alginfo_a.key = (uint64_t)dpaa_mem_vtop(
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(void *)alginfo_a.key);
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alginfo_a.key = (size_t)dpaa_mem_vtop(
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(void *)(size_t)alginfo_a.key);
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alginfo_a.key_type = RTA_DATA_PTR;
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}
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cdb->sh_desc[0] = 0;
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@ -115,7 +115,8 @@ dpaa_buf_free(struct dpaa_bp_info *bp_info, uint64_t addr)
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struct bm_buffer buf;
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int ret;
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DPAA_MEMPOOL_DEBUG("Free 0x%lx to bpid: %d", addr, bp_info->bpid);
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DPAA_MEMPOOL_DEBUG("Free 0x%" PRIx64 " to bpid: %d",
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addr, bp_info->bpid);
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bm_buffer_set64(&buf, addr);
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retry:
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@ -154,8 +155,7 @@ dpaa_mbuf_free_bulk(struct rte_mempool *pool,
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if (unlikely(!bp_info->ptov_off)) {
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/* buffers are from single mem segment */
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if (bp_info->flags & DPAA_MPOOL_SINGLE_SEGMENT) {
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bp_info->ptov_off
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= (uint64_t)obj_table[i] - phy;
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bp_info->ptov_off = (size_t)obj_table[i] - phy;
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rte_dpaa_bpid_info[bp_info->bpid].ptov_off
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= bp_info->ptov_off;
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}
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@ -282,8 +282,8 @@ dpaa_register_memory_area(const struct rte_mempool *mp,
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bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
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total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
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DPAA_MEMPOOL_DEBUG("Req size %lu vs Available %u\n",
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len, total_elt_sz * mp->size);
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DPAA_MEMPOOL_DEBUG("Req size %" PRIx64 " vs Available %u\n",
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(uint64_t)len, total_elt_sz * mp->size);
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/* Detect pool area has sufficient space for elements in this memzone */
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if (len >= total_elt_sz * mp->size)
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@ -46,7 +46,7 @@ static inline void *
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DPAA_MEMPOOL_PTOV(struct dpaa_bp_info *bp_info, uint64_t addr)
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{
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if (bp_info->ptov_off)
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return ((void *)(addr + bp_info->ptov_off));
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return ((void *) (size_t)(addr + bp_info->ptov_off));
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return rte_dpaa_mem_ptov(addr);
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}
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@ -59,7 +59,7 @@
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} while (0)
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#if (defined RTE_LIBRTE_DPAA_DEBUG_DRIVER)
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void dpaa_display_frame(const struct qm_fd *fd)
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static void dpaa_display_frame(const struct qm_fd *fd)
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{
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int ii;
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char *ptr;
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@ -90,11 +90,10 @@ static inline void dpaa_slow_parsing(struct rte_mbuf *m __rte_unused,
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/*TBD:XXX: to be implemented*/
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}
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static inline void dpaa_eth_packet_info(struct rte_mbuf *m,
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uint64_t fd_virt_addr)
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static inline void dpaa_eth_packet_info(struct rte_mbuf *m, void *fd_virt_addr)
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{
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struct annotations_t *annot = GET_ANNOTATIONS(fd_virt_addr);
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uint64_t prs = *((uint64_t *)(&annot->parse)) & DPAA_PARSE_MASK;
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uint64_t prs = *((uintptr_t *)(&annot->parse)) & DPAA_PARSE_MASK;
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DPAA_DP_LOG(DEBUG, " Parsing mbuf: %p with annotations: %p", m, annot);
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@ -351,7 +350,7 @@ dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
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prev_seg = cur_seg;
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}
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dpaa_eth_packet_info(first_seg, (uint64_t)vaddr);
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dpaa_eth_packet_info(first_seg, vaddr);
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rte_pktmbuf_free_seg(temp);
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return first_seg;
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@ -394,7 +393,7 @@ dpaa_eth_fd_to_mbuf(const struct qm_fd *fd, uint32_t ifid)
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mbuf->ol_flags = 0;
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mbuf->next = NULL;
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rte_mbuf_refcnt_set(mbuf, 1);
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dpaa_eth_packet_info(mbuf, (uint64_t)mbuf->buf_addr);
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dpaa_eth_packet_info(mbuf, mbuf->buf_addr);
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return mbuf;
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}
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@ -455,7 +454,7 @@ dpaa_rx_cb(struct qman_fq **fq, struct qm_dqrr_entry **dqrr,
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mbuf->ol_flags = 0;
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mbuf->next = NULL;
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rte_mbuf_refcnt_set(mbuf, 1);
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dpaa_eth_packet_info(mbuf, (uint64_t)mbuf->buf_addr);
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dpaa_eth_packet_info(mbuf, mbuf->buf_addr);
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}
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}
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@ -593,7 +592,7 @@ uint16_t dpaa_eth_queue_rx(void *q,
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static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info)
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{
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int ret;
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uint64_t buf = 0;
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size_t buf = 0;
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struct bm_buffer bufs;
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ret = bman_acquire(bp_info->bp, &bufs, 1, 0);
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@ -602,10 +601,10 @@ static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info)
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return (void *)buf;
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}
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DPAA_DP_LOG(DEBUG, "got buffer 0x%lx from pool %d",
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DPAA_DP_LOG(DEBUG, "got buffer 0x%" PRIx64 " from pool %d",
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(uint64_t)bufs.addr, bufs.bpid);
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buf = (uint64_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr)
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buf = (size_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr)
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- bp_info->meta_data_size;
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if (!buf)
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goto out;
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