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crypto/qat: cleanup code

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Cleanup of unused code.
Rename and simplify a badly named struct element, was aes, but
used for all types of ciphers.
Print correct error msg (Unsupported rather than Undefined)
for all ciphers not supported by QAT PMD.

Signed-off-by: Fiona Trahe <fiona.trahe@intel.com>
Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
This commit is contained in:
Fiona Trahe 2016-09-16 15:19:55 +01:00 committed by Pablo de Lara
parent cb4a1d14bf
commit 0fad384df0
4 changed files with 16 additions and 64 deletions
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10
drivers/crypto/qat/qat_adf/icp_qat_hw.h
View File

@ -293,14 +293,12 @@ enum icp_qat_hw_cipher_convert {
#define ICP_QAT_HW_ZUC_3G_EEA3_KEY_SZ 16
#define ICP_QAT_HW_ZUC_3G_EEA3_IV_SZ 16
#define ICP_QAT_HW_MODE_F8_NUM_REG_TO_CLEAR 2
#define INIT_SHRAM_CONSTANTS_TABLE_SZ 1024
struct icp_qat_hw_cipher_aes256_f8 {
struct icp_qat_hw_cipher_config cipher_config;
uint8_t key[ICP_QAT_HW_AES_256_F8_KEY_SZ];
};
#define ICP_QAT_HW_CIPHER_MAX_KEY_SZ ICP_QAT_HW_AES_256_F8_KEY_SZ
struct icp_qat_hw_cipher_algo_blk {
struct icp_qat_hw_cipher_aes256_f8 aes;
struct icp_qat_hw_cipher_config cipher_config;
uint8_t key[ICP_QAT_HW_CIPHER_MAX_KEY_SZ];
} __rte_cache_aligned;
#endif

1
drivers/crypto/qat/qat_adf/qat_algs.h
View File

@ -100,7 +100,6 @@ struct qat_session {
struct icp_qat_fw_la_bulk_req fw_req;
uint8_t aad_len;
struct qat_crypto_instance *inst;
uint8_t salt[ICP_QAT_HW_AES_BLK_SZ];
rte_spinlock_t lock; /* protects this struct */
};

63
drivers/crypto/qat/qat_adf/qat_algs_build_desc.c
View File

@ -525,7 +525,8 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
qat_alg_init_common_hdr(header, proto);
cipher = (struct icp_qat_hw_cipher_algo_blk *)cdesc->cd_cur_ptr;
cipher->aes.cipher_config.val =
cipher->cipher_config.val =
ICP_QAT_HW_CIPHER_CONFIG_BUILD(cdesc->qat_mode,
cdesc->qat_cipher_alg, key_convert,
cdesc->qat_dir);
@ -534,7 +535,7 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
temp_key = (uint32_t *)(cdesc->cd_cur_ptr +
sizeof(struct icp_qat_hw_cipher_config)
+ cipherkeylen);
memcpy(cipher->aes.key, cipherkey, cipherkeylen);
memcpy(cipher->key, cipherkey, cipherkeylen);
memcpy(temp_key, cipherkey, cipherkeylen);
/* XOR Key with KASUMI F8 key modifier at 4 bytes level */
@ -545,7 +546,7 @@ int qat_alg_aead_session_create_content_desc_cipher(struct qat_session *cdesc,
cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
cipherkeylen + cipherkeylen;
} else {
memcpy(cipher->aes.key, cipherkey, cipherkeylen);
memcpy(cipher->key, cipherkey, cipherkeylen);
cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
cipherkeylen;
}
@ -727,13 +728,13 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
cipherconfig = (struct icp_qat_hw_cipher_algo_blk *)
(cdesc->cd_cur_ptr + state1_size + state2_size);
cipherconfig->aes.cipher_config.val =
cipherconfig->cipher_config.val =
ICP_QAT_HW_CIPHER_CONFIG_BUILD(ICP_QAT_HW_CIPHER_ECB_MODE,
ICP_QAT_HW_CIPHER_ALGO_SNOW_3G_UEA2,
ICP_QAT_HW_CIPHER_KEY_CONVERT,
ICP_QAT_HW_CIPHER_ENCRYPT);
memcpy(cipherconfig->aes.key, authkey, authkeylen);
memset(cipherconfig->aes.key + authkeylen,
memcpy(cipherconfig->key, authkey, authkeylen);
memset(cipherconfig->key + authkeylen,
0, ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ);
cdesc->cd_cur_ptr += sizeof(struct icp_qat_hw_cipher_config) +
authkeylen + ICP_QAT_HW_SNOW_3G_UEA2_IV_SZ;
@ -803,56 +804,6 @@ int qat_alg_aead_session_create_content_desc_auth(struct qat_session *cdesc,
return 0;
}
static void qat_alg_ablkcipher_init_com(struct icp_qat_fw_la_bulk_req *req,
struct icp_qat_hw_cipher_algo_blk *cd,
const uint8_t *key, unsigned int keylen)
{
struct icp_qat_fw_comn_req_hdr_cd_pars *cd_pars = &req->cd_pars;
struct icp_qat_fw_comn_req_hdr *header = &req->comn_hdr;
struct icp_qat_fw_cipher_cd_ctrl_hdr *cd_ctrl = (void *)&req->cd_ctrl;
PMD_INIT_FUNC_TRACE();
rte_memcpy(cd->aes.key, key, keylen);
qat_alg_init_common_hdr(header, ICP_QAT_FW_LA_NO_PROTO);
header->service_cmd_id = ICP_QAT_FW_LA_CMD_CIPHER;
cd_pars->u.s.content_desc_params_sz =
sizeof(struct icp_qat_hw_cipher_algo_blk) >> 3;
/* Cipher CD config setup */
cd_ctrl->cipher_key_sz = keylen >> 3;
cd_ctrl->cipher_state_sz = ICP_QAT_HW_AES_BLK_SZ >> 3;
cd_ctrl->cipher_cfg_offset = 0;
ICP_QAT_FW_COMN_CURR_ID_SET(cd_ctrl, ICP_QAT_FW_SLICE_CIPHER);
ICP_QAT_FW_COMN_NEXT_ID_SET(cd_ctrl, ICP_QAT_FW_SLICE_DRAM_WR);
}
void qat_alg_ablkcipher_init_enc(struct qat_alg_ablkcipher_cd *cdesc,
int alg, const uint8_t *key,
unsigned int keylen)
{
struct icp_qat_hw_cipher_algo_blk *enc_cd = cdesc->cd;
struct icp_qat_fw_la_bulk_req *req = &cdesc->fw_req;
struct icp_qat_fw_comn_req_hdr_cd_pars *cd_pars = &req->cd_pars;
PMD_INIT_FUNC_TRACE();
qat_alg_ablkcipher_init_com(req, enc_cd, key, keylen);
cd_pars->u.s.content_desc_addr = cdesc->cd_paddr;
enc_cd->aes.cipher_config.val = QAT_AES_HW_CONFIG_CBC_ENC(alg);
}
void qat_alg_ablkcipher_init_dec(struct qat_alg_ablkcipher_cd *cdesc,
int alg, const uint8_t *key,
unsigned int keylen)
{
struct icp_qat_hw_cipher_algo_blk *dec_cd = cdesc->cd;
struct icp_qat_fw_la_bulk_req *req = &cdesc->fw_req;
struct icp_qat_fw_comn_req_hdr_cd_pars *cd_pars = &req->cd_pars;
PMD_INIT_FUNC_TRACE();
qat_alg_ablkcipher_init_com(req, dec_cd, key, keylen);
cd_pars->u.s.content_desc_addr = cdesc->cd_paddr;
dec_cd->aes.cipher_config.val = QAT_AES_HW_CONFIG_CBC_DEC(alg);
}
int qat_alg_validate_aes_key(int key_len, enum icp_qat_hw_cipher_algo *alg)
{
switch (key_len) {

6
drivers/crypto/qat/qat_crypto.c
View File

@ -593,7 +593,11 @@ qat_crypto_sym_configure_session_cipher(struct rte_cryptodev *dev,
case RTE_CRYPTO_CIPHER_3DES_CBC:
case RTE_CRYPTO_CIPHER_AES_ECB:
case RTE_CRYPTO_CIPHER_AES_CCM:
PMD_DRV_LOG(ERR, "Crypto: Unsupported Cipher alg %u",
case RTE_CRYPTO_CIPHER_AES_F8:
case RTE_CRYPTO_CIPHER_AES_XTS:
case RTE_CRYPTO_CIPHER_ARC4:
case RTE_CRYPTO_CIPHER_ZUC_EEA3:
PMD_DRV_LOG(ERR, "Crypto QAT PMD: Unsupported Cipher alg %u",
cipher_xform->algo);
goto error_out;
default: