common/cpt: support new firmware

With the latest firmware, there are few changes for zuc and snow3g.

1. The iv_source is present in bitfield 7 of minor opcode. In the
old firmware this was present in bitfield 6.

2. Algorithm type is a 2 bit field in new firmware. In the old
firmware it was named as cipher type and it was a 1 bit field.

Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
This commit is contained in:
Ankur Dwivedi 2019-08-14 15:10:31 +05:30 committed by Akhil Goyal
parent 1a60db7f35
commit 131966f876
2 changed files with 6 additions and 4 deletions

View File

@ -303,8 +303,8 @@ struct cpt_ctx {
uint64_t hmac :1;
uint64_t zsk_flags :3;
uint64_t k_ecb :1;
uint64_t snow3g :1;
uint64_t rsvd :22;
uint64_t snow3g :2;
uint64_t rsvd :21;
/* Below fields are accessed by hardware */
union {
mc_fc_context_t fctx;

View File

@ -1467,7 +1467,8 @@ cpt_zuc_snow3g_enc_prep(uint32_t req_flags,
opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
opcode.s.minor = ((1 << 6) | (snow3g << 5) | (0 << 4) |
opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
(0 << 3) | (flags & 0x7));
if (flags == 0x1) {
@ -1791,7 +1792,8 @@ cpt_zuc_snow3g_dec_prep(uint32_t req_flags,
opcode.s.major = CPT_MAJOR_OP_ZUC_SNOW3G;
/* indicates CPTR ctx, operation type, KEY & IV mode from DPTR */
opcode.s.minor = ((1 << 6) | (snow3g << 5) | (0 << 4) |
opcode.s.minor = ((1 << 7) | (snow3g << 5) | (0 << 4) |
(0 << 3) | (flags & 0x7));
/* consider iv len */