eventdev: fix inconsistency in queue config
With the current scheme of event queue configuration the cfg schedule
type macros (RTE_EVENT_QUEUE_CFG_*_ONLY) are inconsistent with the
event schedule type (RTE_SCHED_TYPE_*) this requires unnecessary
conversion between the fastpath and slowpath API's while scheduling
events or configuring event queues.
This patch aims to fix such inconsistency by using event schedule
types (RTE_SCHED_TYPE_*) for event queue configuration.
This patch also fixes example/eventdev_pipeline_sw_pmd as it doesn't
convert RTE_EVENT_QUEUE_CFG_*_ONLY to RTE_SCHED_TYPE_* which leads to
improper events being enqueued to the eventdev.
Fixes: adb5d5486c
("examples/eventdev_pipeline_sw_pmd: add sample app")
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
This commit is contained in:
parent
bc0d4e6703
commit
13370a3877
@ -92,25 +92,4 @@ evt_has_all_types_queue(uint8_t dev_id)
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true : false;
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}
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static inline uint32_t
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evt_sched_type2queue_cfg(uint8_t sched_type)
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{
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uint32_t ret;
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switch (sched_type) {
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case RTE_SCHED_TYPE_ATOMIC:
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ret = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY;
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break;
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case RTE_SCHED_TYPE_ORDERED:
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ret = RTE_EVENT_QUEUE_CFG_ORDERED_ONLY;
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break;
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case RTE_SCHED_TYPE_PARALLEL:
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ret = RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
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break;
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default:
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rte_panic("Invalid sched_type %d\n", sched_type);
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}
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return ret;
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}
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#endif /* _EVT_COMMON_*/
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@ -164,7 +164,7 @@ order_queue_eventdev_setup(struct evt_test *test, struct evt_options *opt)
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/* q0 (ordered queue) configuration */
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struct rte_event_queue_conf q0_ordered_conf = {
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ORDERED_ONLY,
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.schedule_type = RTE_SCHED_TYPE_ORDERED,
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.nb_atomic_flows = opt->nb_flows,
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.nb_atomic_order_sequences = opt->nb_flows,
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};
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@ -177,7 +177,7 @@ order_queue_eventdev_setup(struct evt_test *test, struct evt_options *opt)
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/* q1 (atomic queue) configuration */
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struct rte_event_queue_conf q1_atomic_conf = {
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
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.schedule_type = RTE_SCHED_TYPE_ATOMIC,
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.nb_atomic_flows = opt->nb_flows,
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.nb_atomic_order_sequences = opt->nb_flows,
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};
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@ -205,8 +205,8 @@ perf_queue_eventdev_setup(struct evt_test *test, struct evt_options *opt)
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};
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/* queue configurations */
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for (queue = 0; queue < perf_queue_nb_event_queues(opt); queue++) {
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q_conf.event_queue_cfg = evt_sched_type2queue_cfg
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(opt->sched_type_list[queue % nb_stages]);
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q_conf.schedule_type =
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(opt->sched_type_list[queue % nb_stages]);
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if (opt->q_priority) {
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uint8_t stage_pos = queue % nb_stages;
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@ -396,8 +396,8 @@ dpaa2_eventdev_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
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RTE_SET_USED(queue_conf);
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queue_conf->nb_atomic_flows = DPAA2_EVENT_QUEUE_ATOMIC_FLOWS;
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queue_conf->event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY |
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RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
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queue_conf->schedule_type = RTE_SCHED_TYPE_ATOMIC |
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RTE_SCHED_TYPE_PARALLEL;
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queue_conf->priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
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}
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@ -345,28 +345,14 @@ sw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
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{
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int type;
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/* SINGLE_LINK can be OR-ed with other types, so handle first */
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type = conf->schedule_type;
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if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg) {
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type = SW_SCHED_TYPE_DIRECT;
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} else {
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switch (conf->event_queue_cfg) {
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case RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY:
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type = RTE_SCHED_TYPE_ATOMIC;
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break;
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case RTE_EVENT_QUEUE_CFG_ORDERED_ONLY:
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type = RTE_SCHED_TYPE_ORDERED;
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break;
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case RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY:
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type = RTE_SCHED_TYPE_PARALLEL;
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break;
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case RTE_EVENT_QUEUE_CFG_ALL_TYPES:
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SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
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return -ENOTSUP;
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default:
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SW_LOG_ERR("Unknown queue type %d requested\n",
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conf->event_queue_cfg);
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return -EINVAL;
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}
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} else if (RTE_EVENT_QUEUE_CFG_ALL_TYPES
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& conf->event_queue_cfg) {
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SW_LOG_ERR("QUEUE_CFG_ALL_TYPES not supported\n");
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return -ENOTSUP;
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}
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struct sw_evdev *sw = sw_pmd_priv(dev);
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@ -400,7 +386,7 @@ sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id,
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static const struct rte_event_queue_conf default_conf = {
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.nb_atomic_flows = 4096,
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.nb_atomic_order_sequences = 1,
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.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
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.schedule_type = RTE_SCHED_TYPE_ATOMIC,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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};
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@ -108,7 +108,7 @@ struct config_data {
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static struct config_data cdata = {
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.num_packets = (1L << 25), /* do ~32M packets */
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.num_fids = 512,
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.queue_type = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
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.queue_type = RTE_SCHED_TYPE_ATOMIC,
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.next_qid = {-1},
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.qid = {-1},
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.num_stages = 1,
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@ -490,10 +490,10 @@ parse_app_args(int argc, char **argv)
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cdata.enable_queue_priorities = 1;
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break;
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case 'o':
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cdata.queue_type = RTE_EVENT_QUEUE_CFG_ORDERED_ONLY;
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cdata.queue_type = RTE_SCHED_TYPE_ORDERED;
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break;
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case 'p':
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cdata.queue_type = RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
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cdata.queue_type = RTE_SCHED_TYPE_PARALLEL;
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break;
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case 'q':
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cdata.quiet = 1;
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@ -684,7 +684,7 @@ setup_eventdev(struct prod_data *prod_data,
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.new_event_threshold = 4096,
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};
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struct rte_event_queue_conf wkr_q_conf = {
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.event_queue_cfg = cdata.queue_type,
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.schedule_type = cdata.queue_type,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.nb_atomic_flows = 1024,
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.nb_atomic_order_sequences = 1024,
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@ -751,11 +751,11 @@ setup_eventdev(struct prod_data *prod_data,
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}
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const char *type_str = "Atomic";
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switch (wkr_q_conf.event_queue_cfg) {
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case RTE_EVENT_QUEUE_CFG_ORDERED_ONLY:
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switch (wkr_q_conf.schedule_type) {
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case RTE_SCHED_TYPE_ORDERED:
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type_str = "Ordered";
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break;
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case RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY:
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case RTE_SCHED_TYPE_PARALLEL:
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type_str = "Parallel";
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break;
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}
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@ -907,9 +907,9 @@ main(int argc, char **argv)
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printf("\tworkers: %u\n", cdata.num_workers);
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printf("\tpackets: %"PRIi64"\n", cdata.num_packets);
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printf("\tQueue-prio: %u\n", cdata.enable_queue_priorities);
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if (cdata.queue_type == RTE_EVENT_QUEUE_CFG_ORDERED_ONLY)
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if (cdata.queue_type == RTE_SCHED_TYPE_ORDERED)
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printf("\tqid0 type: ordered\n");
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if (cdata.queue_type == RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY)
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if (cdata.queue_type == RTE_SCHED_TYPE_ATOMIC)
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printf("\tqid0 type: atomic\n");
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printf("\tCores available: %u\n", rte_lcore_count());
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printf("\tCores used: %u\n", cores_needed);
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@ -517,13 +517,11 @@ is_valid_atomic_queue_conf(const struct rte_event_queue_conf *queue_conf)
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{
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if (queue_conf &&
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!(queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_SINGLE_LINK) && (
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RTE_EVENT_QUEUE_CFG_SINGLE_LINK) &&
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((queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK)
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== RTE_EVENT_QUEUE_CFG_ALL_TYPES) ||
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((queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK)
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== RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY)
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RTE_EVENT_QUEUE_CFG_ALL_TYPES) ||
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(queue_conf->schedule_type
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== RTE_SCHED_TYPE_ATOMIC)
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))
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return 1;
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else
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@ -535,13 +533,11 @@ is_valid_ordered_queue_conf(const struct rte_event_queue_conf *queue_conf)
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{
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if (queue_conf &&
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!(queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_SINGLE_LINK) && (
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RTE_EVENT_QUEUE_CFG_SINGLE_LINK) &&
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((queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK)
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== RTE_EVENT_QUEUE_CFG_ALL_TYPES) ||
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((queue_conf->event_queue_cfg &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK)
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== RTE_EVENT_QUEUE_CFG_ORDERED_ONLY)
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RTE_EVENT_QUEUE_CFG_ALL_TYPES) ||
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(queue_conf->schedule_type
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== RTE_SCHED_TYPE_ORDERED)
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))
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return 1;
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else
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@ -270,9 +270,9 @@ struct rte_mbuf; /* we just use mbuf pointers; no need to include rte_mbuf.h */
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#define RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES (1ULL << 3)
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/**< Event device is capable of enqueuing events of any type to any queue.
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* If this capability is not set, the queue only supports events of the
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* *RTE_EVENT_QUEUE_CFG_* type that it was created with.
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* *RTE_SCHED_TYPE_* type that it was created with.
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*
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* @see RTE_EVENT_QUEUE_CFG_* values
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* @see RTE_SCHED_TYPE_* values
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*/
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#define RTE_EVENT_DEV_CAP_BURST_MODE (1ULL << 4)
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/**< Event device is capable of operating in burst mode for enqueue(forward,
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@ -515,39 +515,13 @@ rte_event_dev_configure(uint8_t dev_id,
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/* Event queue specific APIs */
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/* Event queue configuration bitmap flags */
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#define RTE_EVENT_QUEUE_CFG_TYPE_MASK (3ULL << 0)
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/**< Mask for event queue schedule type configuration request */
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#define RTE_EVENT_QUEUE_CFG_ALL_TYPES (0ULL << 0)
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#define RTE_EVENT_QUEUE_CFG_ALL_TYPES (1ULL << 0)
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/**< Allow ATOMIC,ORDERED,PARALLEL schedule type enqueue
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*
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* @see RTE_SCHED_TYPE_ORDERED, RTE_SCHED_TYPE_ATOMIC, RTE_SCHED_TYPE_PARALLEL
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* @see rte_event_enqueue_burst()
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*/
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#define RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY (1ULL << 0)
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/**< Allow only ATOMIC schedule type enqueue
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*
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* The rte_event_enqueue_burst() result is undefined if the queue configured
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* with ATOMIC only and sched_type != RTE_SCHED_TYPE_ATOMIC
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*
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* @see RTE_SCHED_TYPE_ATOMIC, rte_event_enqueue_burst()
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*/
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#define RTE_EVENT_QUEUE_CFG_ORDERED_ONLY (2ULL << 0)
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/**< Allow only ORDERED schedule type enqueue
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*
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* The rte_event_enqueue_burst() result is undefined if the queue configured
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* with ORDERED only and sched_type != RTE_SCHED_TYPE_ORDERED
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*
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* @see RTE_SCHED_TYPE_ORDERED, rte_event_enqueue_burst()
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*/
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#define RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY (3ULL << 0)
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/**< Allow only PARALLEL schedule type enqueue
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*
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* The rte_event_enqueue_burst() result is undefined if the queue configured
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* with PARALLEL only and sched_type != RTE_SCHED_TYPE_PARALLEL
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*
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* @see RTE_SCHED_TYPE_PARALLEL, rte_event_enqueue_burst()
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*/
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#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 2)
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#define RTE_EVENT_QUEUE_CFG_SINGLE_LINK (1ULL << 1)
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/**< This event queue links only to a single event port.
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*
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* @see rte_event_port_setup(), rte_event_port_link()
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@ -558,8 +532,8 @@ struct rte_event_queue_conf {
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uint32_t nb_atomic_flows;
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/**< The maximum number of active flows this queue can track at any
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* given time. If the queue is configured for atomic scheduling (by
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* applying the RTE_EVENT_QUEUE_CFG_ALL_TYPES or
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* RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY flags to event_queue_cfg), then the
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* applying the RTE_EVENT_QUEUE_CFG_ALL_TYPES flag to event_queue_cfg
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* or RTE_SCHED_TYPE_ATOMIC flag to schedule_type), then the
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* value must be in the range of [1, nb_event_queue_flows], which was
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* previously provided in rte_event_dev_configure().
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*/
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@ -572,12 +546,18 @@ struct rte_event_queue_conf {
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* event will be returned from dequeue until one or more entries are
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* freed up/released.
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* If the queue is configured for ordered scheduling (by applying the
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* RTE_EVENT_QUEUE_CFG_ALL_TYPES or RTE_EVENT_QUEUE_CFG_ORDERED_ONLY
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* flags to event_queue_cfg), then the value must be in the range of
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* [1, nb_event_queue_flows], which was previously supplied to
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* rte_event_dev_configure().
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* RTE_EVENT_QUEUE_CFG_ALL_TYPES flag to event_queue_cfg or
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* RTE_SCHED_TYPE_ORDERED flag to schedule_type), then the value must
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* be in the range of [1, nb_event_queue_flows], which was
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* previously supplied to rte_event_dev_configure().
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*/
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uint32_t event_queue_cfg;
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/**< Queue cfg flags(EVENT_QUEUE_CFG_) */
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uint8_t schedule_type;
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/**< Queue schedule type(RTE_SCHED_TYPE_*).
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* Valid when RTE_EVENT_QUEUE_CFG_ALL_TYPES bit is not set in
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* event_queue_cfg.
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*/
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uint32_t event_queue_cfg; /**< Queue cfg flags(EVENT_QUEUE_CFG_) */
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uint8_t priority;
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/**< Priority for this event queue relative to other event queues.
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* The requested priority should in the range of
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@ -300,15 +300,13 @@ test_eventdev_queue_setup(void)
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/* Negative cases */
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ret = rte_event_queue_default_conf_get(TEST_DEV_ID, 0, &qconf);
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TEST_ASSERT_SUCCESS(ret, "Failed to get queue0 info");
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qconf.event_queue_cfg = (RTE_EVENT_QUEUE_CFG_ALL_TYPES &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK);
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qconf.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ALL_TYPES;
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qconf.nb_atomic_flows = info.max_event_queue_flows + 1;
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ret = rte_event_queue_setup(TEST_DEV_ID, 0, &qconf);
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TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
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qconf.nb_atomic_flows = info.max_event_queue_flows;
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qconf.event_queue_cfg = (RTE_EVENT_QUEUE_CFG_ORDERED_ONLY &
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RTE_EVENT_QUEUE_CFG_TYPE_MASK);
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qconf.schedule_type = RTE_SCHED_TYPE_ORDERED;
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qconf.nb_atomic_order_sequences = info.max_event_queue_flows + 1;
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ret = rte_event_queue_setup(TEST_DEV_ID, 0, &qconf);
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TEST_ASSERT(ret == -EINVAL, "Expected -EINVAL, %d", ret);
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@ -423,7 +421,7 @@ test_eventdev_queue_attr_nb_atomic_flows(void)
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/* Assume PMD doesn't support atomic flows, return early */
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return -ENOTSUP;
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qconf.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY;
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qconf.schedule_type = RTE_SCHED_TYPE_ATOMIC;
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for (i = 0; i < (int)queue_count; i++) {
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ret = rte_event_queue_setup(TEST_DEV_ID, i, &qconf);
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@ -466,7 +464,7 @@ test_eventdev_queue_attr_nb_atomic_order_sequences(void)
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/* Assume PMD doesn't support reordering */
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return -ENOTSUP;
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qconf.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ORDERED_ONLY;
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qconf.schedule_type = RTE_SCHED_TYPE_ORDERED;
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for (i = 0; i < (int)queue_count; i++) {
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ret = rte_event_queue_setup(TEST_DEV_ID, i, &qconf);
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@ -507,7 +505,7 @@ test_eventdev_queue_attr_event_queue_cfg(void)
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ret = rte_event_queue_default_conf_get(TEST_DEV_ID, 0, &qconf);
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TEST_ASSERT_SUCCESS(ret, "Failed to get queue0 def conf");
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qconf.event_queue_cfg = RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY;
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qconf.event_queue_cfg = RTE_EVENT_QUEUE_CFG_SINGLE_LINK;
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for (i = 0; i < (int)queue_count; i++) {
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ret = rte_event_queue_setup(TEST_DEV_ID, i, &qconf);
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@ -219,7 +219,7 @@ create_lb_qids(struct test *t, int num_qids, uint32_t flags)
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/* Q creation */
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const struct rte_event_queue_conf conf = {
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.event_queue_cfg = flags,
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.schedule_type = flags,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
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.nb_atomic_flows = 1024,
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.nb_atomic_order_sequences = 1024,
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@ -242,20 +242,20 @@ create_lb_qids(struct test *t, int num_qids, uint32_t flags)
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static inline int
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create_atomic_qids(struct test *t, int num_qids)
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{
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return create_lb_qids(t, num_qids, RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY);
|
||||
return create_lb_qids(t, num_qids, RTE_SCHED_TYPE_ATOMIC);
|
||||
}
|
||||
|
||||
static inline int
|
||||
create_ordered_qids(struct test *t, int num_qids)
|
||||
{
|
||||
return create_lb_qids(t, num_qids, RTE_EVENT_QUEUE_CFG_ORDERED_ONLY);
|
||||
return create_lb_qids(t, num_qids, RTE_SCHED_TYPE_ORDERED);
|
||||
}
|
||||
|
||||
|
||||
static inline int
|
||||
create_unordered_qids(struct test *t, int num_qids)
|
||||
{
|
||||
return create_lb_qids(t, num_qids, RTE_EVENT_QUEUE_CFG_PARALLEL_ONLY);
|
||||
return create_lb_qids(t, num_qids, RTE_SCHED_TYPE_PARALLEL);
|
||||
}
|
||||
|
||||
static inline int
|
||||
@ -1238,7 +1238,7 @@ port_reconfig_credits(struct test *t)
|
||||
const uint32_t NUM_ITERS = 32;
|
||||
for (i = 0; i < NUM_ITERS; i++) {
|
||||
const struct rte_event_queue_conf conf = {
|
||||
.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
|
||||
.schedule_type = RTE_SCHED_TYPE_ATOMIC,
|
||||
.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
|
||||
.nb_atomic_flows = 1024,
|
||||
.nb_atomic_order_sequences = 1024,
|
||||
@ -1320,7 +1320,7 @@ port_single_lb_reconfig(struct test *t)
|
||||
|
||||
static const struct rte_event_queue_conf conf_lb_atomic = {
|
||||
.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
|
||||
.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
|
||||
.schedule_type = RTE_SCHED_TYPE_ATOMIC,
|
||||
.nb_atomic_flows = 1024,
|
||||
.nb_atomic_order_sequences = 1024,
|
||||
};
|
||||
@ -1818,7 +1818,7 @@ ordered_reconfigure(struct test *t)
|
||||
}
|
||||
|
||||
const struct rte_event_queue_conf conf = {
|
||||
.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ORDERED_ONLY,
|
||||
.schedule_type = RTE_SCHED_TYPE_ORDERED,
|
||||
.priority = RTE_EVENT_DEV_PRIORITY_NORMAL,
|
||||
.nb_atomic_flows = 1024,
|
||||
.nb_atomic_order_sequences = 1024,
|
||||
@ -1865,7 +1865,7 @@ qid_priorities(struct test *t)
|
||||
for (i = 0; i < 3; i++) {
|
||||
/* Create QID */
|
||||
const struct rte_event_queue_conf conf = {
|
||||
.event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY,
|
||||
.schedule_type = RTE_SCHED_TYPE_ATOMIC,
|
||||
/* increase priority (0 == highest), as we go */
|
||||
.priority = RTE_EVENT_DEV_PRIORITY_NORMAL - i,
|
||||
.nb_atomic_flows = 1024,
|
||||
|
Loading…
Reference in New Issue
Block a user