net/octeontx2: alloc and free TM HW resources
Allocate and free shaper/scheduler hardware resources for nodes of hierarchy levels in sw. Signed-off-by: Krzysztof Kanas <kkanas@marvell.com> Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
This commit is contained in:
Krzysztof Kanas
Ferruh Yigit
parent
e7b4cc8c47
commit
1439b6a999
@ -54,6 +54,69 @@ nix_tm_node_search(struct otx2_eth_dev *dev,
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return NULL;
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}
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static uint32_t
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check_rr(struct otx2_eth_dev *dev, uint32_t priority, uint32_t parent_id)
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{
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struct otx2_nix_tm_node *tm_node;
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uint32_t rr_num = 0;
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TAILQ_FOREACH(tm_node, &dev->node_list, node) {
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if (!tm_node->parent)
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continue;
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if (!(tm_node->parent->id == parent_id))
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continue;
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if (tm_node->priority == priority)
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rr_num++;
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}
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return rr_num;
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}
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static int
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nix_tm_update_parent_info(struct otx2_eth_dev *dev)
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{
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struct otx2_nix_tm_node *tm_node_child;
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struct otx2_nix_tm_node *tm_node;
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struct otx2_nix_tm_node *parent;
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uint32_t rr_num = 0;
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uint32_t priority;
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TAILQ_FOREACH(tm_node, &dev->node_list, node) {
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if (!tm_node->parent)
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continue;
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/* Count group of children of same priority i.e are RR */
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parent = tm_node->parent;
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priority = tm_node->priority;
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rr_num = check_rr(dev, priority, parent->id);
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/* Assuming that multiple RR groups are
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* not configured based on capability.
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*/
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if (rr_num > 1) {
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parent->rr_prio = priority;
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parent->rr_num = rr_num;
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}
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/* Find out static priority children that are not in RR */
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TAILQ_FOREACH(tm_node_child, &dev->node_list, node) {
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if (!tm_node_child->parent)
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continue;
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if (parent->id != tm_node_child->parent->id)
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continue;
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if (parent->max_prio == UINT32_MAX &&
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tm_node_child->priority != parent->rr_prio)
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parent->max_prio = 0;
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if (parent->max_prio < tm_node_child->priority &&
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parent->rr_prio != tm_node_child->priority)
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parent->max_prio = tm_node_child->priority;
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}
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}
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return 0;
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}
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static int
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nix_tm_node_add_to_list(struct otx2_eth_dev *dev, uint32_t node_id,
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uint32_t parent_node_id, uint32_t priority,
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@ -115,6 +178,274 @@ nix_tm_clear_shaper_profiles(struct otx2_eth_dev *dev)
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return 0;
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}
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static int
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nix_tm_free_resources(struct otx2_eth_dev *dev, uint32_t flags_mask,
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uint32_t flags, bool hw_only)
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{
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struct otx2_nix_tm_shaper_profile *shaper_profile;
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struct otx2_nix_tm_node *tm_node, *next_node;
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struct otx2_mbox *mbox = dev->mbox;
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struct nix_txsch_free_req *req;
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uint32_t shaper_profile_id;
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bool skip_node = false;
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int rc = 0;
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next_node = TAILQ_FIRST(&dev->node_list);
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while (next_node) {
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tm_node = next_node;
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next_node = TAILQ_NEXT(tm_node, node);
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/* Check for only requested nodes */
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if ((tm_node->flags & flags_mask) != flags)
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continue;
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if (nix_tm_have_tl1_access(dev) &&
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tm_node->hw_lvl_id == NIX_TXSCH_LVL_TL1)
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skip_node = true;
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otx2_tm_dbg("Free hwres for node %u, hwlvl %u, hw_id %u (%p)",
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tm_node->id, tm_node->hw_lvl_id,
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tm_node->hw_id, tm_node);
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/* Free specific HW resource if requested */
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if (!skip_node && flags_mask &&
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tm_node->flags & NIX_TM_NODE_HWRES) {
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req = otx2_mbox_alloc_msg_nix_txsch_free(mbox);
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req->flags = 0;
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req->schq_lvl = tm_node->hw_lvl_id;
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req->schq = tm_node->hw_id;
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rc = otx2_mbox_process(mbox);
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if (rc)
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break;
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} else {
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skip_node = false;
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}
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tm_node->flags &= ~NIX_TM_NODE_HWRES;
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/* Leave software elements if needed */
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if (hw_only)
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continue;
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shaper_profile_id = tm_node->params.shaper_profile_id;
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shaper_profile =
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nix_tm_shaper_profile_search(dev, shaper_profile_id);
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if (shaper_profile)
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shaper_profile->reference_count--;
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TAILQ_REMOVE(&dev->node_list, tm_node, node);
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rte_free(tm_node);
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}
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if (!flags_mask) {
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/* Free all hw resources */
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req = otx2_mbox_alloc_msg_nix_txsch_free(mbox);
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req->flags = TXSCHQ_FREE_ALL;
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return otx2_mbox_process(mbox);
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}
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return rc;
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}
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static uint8_t
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nix_tm_copy_rsp_to_dev(struct otx2_eth_dev *dev,
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struct nix_txsch_alloc_rsp *rsp)
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{
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uint16_t schq;
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uint8_t lvl;
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for (lvl = 0; lvl < NIX_TXSCH_LVL_CNT; lvl++) {
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for (schq = 0; schq < MAX_TXSCHQ_PER_FUNC; schq++) {
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dev->txschq_list[lvl][schq] = rsp->schq_list[lvl][schq];
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dev->txschq_contig_list[lvl][schq] =
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rsp->schq_contig_list[lvl][schq];
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}
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dev->txschq[lvl] = rsp->schq[lvl];
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dev->txschq_contig[lvl] = rsp->schq_contig[lvl];
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}
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return 0;
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}
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static int
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nix_tm_assign_id_to_node(struct otx2_eth_dev *dev,
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struct otx2_nix_tm_node *child,
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struct otx2_nix_tm_node *parent)
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{
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uint32_t hw_id, schq_con_index, prio_offset;
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uint32_t l_id, schq_index;
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otx2_tm_dbg("Assign hw id for child node %u, lvl %u, hw_lvl %u (%p)",
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child->id, child->level_id, child->hw_lvl_id, child);
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child->flags |= NIX_TM_NODE_HWRES;
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/* Process root nodes */
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if (dev->otx2_tm_root_lvl == NIX_TXSCH_LVL_TL2 &&
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child->hw_lvl_id == dev->otx2_tm_root_lvl && !parent) {
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int idx = 0;
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uint32_t tschq_con_index;
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l_id = child->hw_lvl_id;
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tschq_con_index = dev->txschq_contig_index[l_id];
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hw_id = dev->txschq_contig_list[l_id][tschq_con_index];
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child->hw_id = hw_id;
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dev->txschq_contig_index[l_id]++;
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/* Update TL1 hw_id for its parent for config purpose */
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idx = dev->txschq_index[NIX_TXSCH_LVL_TL1]++;
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hw_id = dev->txschq_list[NIX_TXSCH_LVL_TL1][idx];
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child->parent_hw_id = hw_id;
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return 0;
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}
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if (dev->otx2_tm_root_lvl == NIX_TXSCH_LVL_TL1 &&
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child->hw_lvl_id == dev->otx2_tm_root_lvl && !parent) {
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uint32_t tschq_con_index;
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l_id = child->hw_lvl_id;
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tschq_con_index = dev->txschq_index[l_id];
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hw_id = dev->txschq_list[l_id][tschq_con_index];
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child->hw_id = hw_id;
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dev->txschq_index[l_id]++;
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return 0;
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}
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/* Process children with parents */
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l_id = child->hw_lvl_id;
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schq_index = dev->txschq_index[l_id];
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schq_con_index = dev->txschq_contig_index[l_id];
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if (child->priority == parent->rr_prio) {
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hw_id = dev->txschq_list[l_id][schq_index];
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child->hw_id = hw_id;
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child->parent_hw_id = parent->hw_id;
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dev->txschq_index[l_id]++;
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} else {
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prio_offset = schq_con_index + child->priority;
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hw_id = dev->txschq_contig_list[l_id][prio_offset];
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child->hw_id = hw_id;
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}
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return 0;
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}
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static int
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nix_tm_assign_hw_id(struct otx2_eth_dev *dev)
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{
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struct otx2_nix_tm_node *parent, *child;
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uint32_t child_hw_lvl, con_index_inc, i;
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for (i = NIX_TXSCH_LVL_TL1; i > 0; i--) {
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TAILQ_FOREACH(parent, &dev->node_list, node) {
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child_hw_lvl = parent->hw_lvl_id - 1;
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if (parent->hw_lvl_id != i)
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continue;
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TAILQ_FOREACH(child, &dev->node_list, node) {
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if (!child->parent)
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continue;
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if (child->parent->id != parent->id)
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continue;
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nix_tm_assign_id_to_node(dev, child, parent);
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}
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con_index_inc = parent->max_prio + 1;
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dev->txschq_contig_index[child_hw_lvl] += con_index_inc;
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/*
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* Explicitly assign id to parent node if it
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* doesn't have a parent
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*/
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if (parent->hw_lvl_id == dev->otx2_tm_root_lvl)
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nix_tm_assign_id_to_node(dev, parent, NULL);
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}
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}
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return 0;
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}
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static uint8_t
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nix_tm_count_req_schq(struct otx2_eth_dev *dev,
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struct nix_txsch_alloc_req *req, uint8_t lvl)
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{
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struct otx2_nix_tm_node *tm_node;
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uint8_t contig_count;
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TAILQ_FOREACH(tm_node, &dev->node_list, node) {
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if (lvl == tm_node->hw_lvl_id) {
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req->schq[lvl - 1] += tm_node->rr_num;
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if (tm_node->max_prio != UINT32_MAX) {
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contig_count = tm_node->max_prio + 1;
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req->schq_contig[lvl - 1] += contig_count;
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}
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}
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if (lvl == dev->otx2_tm_root_lvl &&
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dev->otx2_tm_root_lvl && lvl == NIX_TXSCH_LVL_TL2 &&
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tm_node->hw_lvl_id == dev->otx2_tm_root_lvl) {
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req->schq_contig[dev->otx2_tm_root_lvl]++;
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}
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}
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req->schq[NIX_TXSCH_LVL_TL1] = 1;
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req->schq_contig[NIX_TXSCH_LVL_TL1] = 0;
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return 0;
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}
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static int
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nix_tm_prepare_txschq_req(struct otx2_eth_dev *dev,
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struct nix_txsch_alloc_req *req)
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{
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uint8_t i;
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for (i = NIX_TXSCH_LVL_TL1; i > 0; i--)
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nix_tm_count_req_schq(dev, req, i);
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for (i = 0; i < NIX_TXSCH_LVL_CNT; i++) {
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dev->txschq_index[i] = 0;
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dev->txschq_contig_index[i] = 0;
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}
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return 0;
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}
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static int
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nix_tm_send_txsch_alloc_msg(struct otx2_eth_dev *dev)
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{
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struct otx2_mbox *mbox = dev->mbox;
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struct nix_txsch_alloc_req *req;
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struct nix_txsch_alloc_rsp *rsp;
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int rc;
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req = otx2_mbox_alloc_msg_nix_txsch_alloc(mbox);
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rc = nix_tm_prepare_txschq_req(dev, req);
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if (rc)
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return rc;
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rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
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if (rc)
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return rc;
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nix_tm_copy_rsp_to_dev(dev, rsp);
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nix_tm_assign_hw_id(dev);
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return 0;
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}
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static int
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nix_tm_alloc_resources(struct rte_eth_dev *eth_dev, bool xmit_enable)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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int rc;
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RTE_SET_USED(xmit_enable);
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nix_tm_update_parent_info(dev);
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rc = nix_tm_send_txsch_alloc_msg(dev);
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if (rc) {
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otx2_err("TM failed to alloc tm resources=%d", rc);
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return rc;
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}
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return 0;
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}
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static int
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nix_tm_prepare_default_tree(struct rte_eth_dev *eth_dev)
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{
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@ -226,6 +557,13 @@ int otx2_nix_tm_init_default(struct rte_eth_dev *eth_dev)
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uint16_t sq_cnt = eth_dev->data->nb_tx_queues;
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int rc;
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/* Free up all resources already held */
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rc = nix_tm_free_resources(dev, 0, 0, false);
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if (rc) {
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otx2_err("Failed to freeup existing resources,rc=%d", rc);
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return rc;
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}
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/* Clear shaper profiles */
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nix_tm_clear_shaper_profiles(dev);
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dev->tm_flags = NIX_TM_DEFAULT_TREE;
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@ -234,6 +572,9 @@ int otx2_nix_tm_init_default(struct rte_eth_dev *eth_dev)
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if (rc != 0)
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return rc;
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rc = nix_tm_alloc_resources(eth_dev, false);
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if (rc != 0)
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return rc;
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dev->tm_leaf_cnt = sq_cnt;
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return 0;
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@ -243,6 +584,15 @@ int
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otx2_nix_tm_fini(struct rte_eth_dev *eth_dev)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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int rc;
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/* Xmit is assumed to be disabled */
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/* Free up resources already held */
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rc = nix_tm_free_resources(dev, 0, 0, false);
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if (rc) {
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otx2_err("Failed to freeup existing resources,rc=%d", rc);
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return rc;
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}
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/* Clear shaper profiles */
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nix_tm_clear_shaper_profiles(dev);
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