doc: add Marvell OCTEON TX2 platform guide
Platform specific guide for Marvell OCTEON TX2 SoC is added. Signed-off-by: Jerin Jacob <jerinj@marvell.com> Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Signed-off-by: Shally Verma <shallyv@marvell.com> Signed-off-by: Vivek Sharma <viveksharma@marvell.com>
This commit is contained in:
Jerin Jacob
Thomas Monjalon
parent
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commit
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@ -450,6 +450,8 @@ M: Jerin Jacob <jerinj@marvell.com>
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M: Nithin Dabilpuram <ndabilpuram@marvell.com>
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M: Vamsi Attunuru <vattunuru@marvell.com>
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F: drivers/common/octeontx2/
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F: doc/guides/platform/img/octeontx2_*
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F: doc/guides/platform/octeontx2.rst
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Bus Drivers
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doc/guides/platform/img/octeontx2_packet_flow_hw_accelerators.svg
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doc/guides/platform/img/octeontx2_packet_flow_hw_accelerators.svg
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doc/guides/platform/img/octeontx2_resource_virtualization.svg
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doc/guides/platform/img/octeontx2_resource_virtualization.svg
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@ -14,3 +14,4 @@ The following are platform specific guides and setup information.
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dpaa
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dpaa2
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octeontx
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octeontx2
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494
doc/guides/platform/octeontx2.rst
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doc/guides/platform/octeontx2.rst
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@ -0,0 +1,494 @@
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2019 Marvell International Ltd.
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Marvell OCTEON TX2 Platform Guide
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=================================
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This document gives an overview of **Marvell OCTEON TX2** RVU H/W block,
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packet flow and procedure to build DPDK on OCTEON TX2 platform.
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More information about OCTEON TX2 SoC can be found at `Marvell Official Website
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<https://www.marvell.com/embedded-processors/infrastructure-processors/>`_.
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Supported OCTEON TX2 SoCs
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-------------------------
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- CN96xx
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- CN93xx
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OCTEON TX2 Resource Virtualization Unit architecture
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----------------------------------------------------
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The :numref:`figure_octeontx2_resource_virtualization` diagram depicts the
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RVU architecture and a resource provisioning example.
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.. _figure_octeontx2_resource_virtualization:
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.. figure:: img/octeontx2_resource_virtualization.*
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OCTEON TX2 Resource virtualization architecture and provisioning example
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Resource Virtualization Unit (RVU) on Marvell's OCTEON TX2 SoC maps HW
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resources belonging to the network, crypto and other functional blocks onto
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PCI-compatible physical and virtual functions.
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Each functional block has multiple local functions (LFs) for
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provisioning to different PCIe devices. RVU supports multiple PCIe SRIOV
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physical functions (PFs) and virtual functions (VFs).
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The :numref:`table_octeontx2_rvu_dpdk_mapping` shows the various local
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functions (LFs) provided by the RVU and its functional mapping to
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DPDK subsystem.
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.. _table_octeontx2_rvu_dpdk_mapping:
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.. table:: RVU managed functional blocks and its mapping to DPDK subsystem
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+---+-----+--------------------------------------------------------------+
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| # | LF | DPDK subsystem mapping |
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+===+=====+==============================================================+
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| 1 | NIX | rte_ethdev, rte_tm, rte_event_eth_[rt]x_adapter, rte_security|
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+---+-----+--------------------------------------------------------------+
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| 2 | NPA | rte_mempool |
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+---+-----+--------------------------------------------------------------+
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| 3 | NPC | rte_flow |
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+---+-----+--------------------------------------------------------------+
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| 4 | CPT | rte_cryptodev, rte_event_crypto_adapter |
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+---+-----+--------------------------------------------------------------+
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| 5 | SSO | rte_eventdev |
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+---+-----+--------------------------------------------------------------+
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| 6 | TIM | rte_event_timer_adapter |
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+---+-----+--------------------------------------------------------------+
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PF0 is called the administrative / admin function (AF) and has exclusive
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privileges to provision RVU functional block's LFs to each of the PF/VF.
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PF/VFs communicates with AF via a shared memory region (mailbox).Upon receiving
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requests from PF/VF, AF does resource provisioning and other HW configuration.
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AF is always attached to host, but PF/VFs may be used by host kernel itself,
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or attached to VMs or to userspace applications like DPDK, etc. So, AF has to
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handle provisioning/configuration requests sent by any device from any domain.
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The AF driver does not receive or process any data.
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It is only a configuration driver used in control path.
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The :numref:`figure_octeontx2_resource_virtualization` diagram also shows a
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resource provisioning example where,
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1. PFx and PFx-VF0 bound to Linux netdev driver.
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2. PFx-VF1 ethdev driver bound to the first DPDK application.
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3. PFy ethdev driver, PFy-VF0 ethdev driver, PFz eventdev driver, PFm-VF0 cryptodev driver bound to the second DPDK application.
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OCTEON TX2 packet flow
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----------------------
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The :numref:`figure_octeontx2_packet_flow_hw_accelerators` diagram depicts
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the packet flow on OCTEON TX2 SoC in conjunction with use of various HW accelerators.
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.. _figure_octeontx2_packet_flow_hw_accelerators:
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.. figure:: img/octeontx2_packet_flow_hw_accelerators.*
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OCTEON TX2 packet flow in conjunction with use of HW accelerators
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HW Offload Drivers
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------------------
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This section lists dataplane H/W block(s) available in OCTEON TX2 SoC.
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Procedure to Setup Platform
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---------------------------
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There are three main prerequisites for setting up DPDK on OCTEON TX2
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compatible board:
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1. **OCTEON TX2 Linux kernel driver**
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The dependent kernel drivers can be obtained from the
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`kernel.org <https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/ethernet/marvell/octeontx2>`_.
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Alternatively, the Marvell SDK also provides the required kernel drivers.
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Linux kernel should be configured with the following features enabled:
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.. code-block:: console
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# 64K pages enabled for better performance
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CONFIG_ARM64_64K_PAGES=y
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CONFIG_ARM64_VA_BITS_48=y
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# huge pages support enabled
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CONFIG_HUGETLBFS=y
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CONFIG_HUGETLB_PAGE=y
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# VFIO enabled with TYPE1 IOMMU at minimum
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CONFIG_VFIO_IOMMU_TYPE1=y
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CONFIG_VFIO_VIRQFD=y
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CONFIG_VFIO=y
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CONFIG_VFIO_NOIOMMU=y
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CONFIG_VFIO_PCI=y
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CONFIG_VFIO_PCI_MMAP=y
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# SMMUv3 driver
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CONFIG_ARM_SMMU_V3=y
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# ARMv8.1 LSE atomics
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CONFIG_ARM64_LSE_ATOMICS=y
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# OCTEONTX2 drivers
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CONFIG_OCTEONTX2_MBOX=y
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CONFIG_OCTEONTX2_AF=y
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# Enable if netdev PF driver required
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CONFIG_OCTEONTX2_PF=y
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# Enable if netdev VF driver required
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CONFIG_OCTEONTX2_VF=y
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CONFIG_CRYPTO_DEV_OCTEONTX2_CPT=y
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2. **ARM64 Linux Tool Chain**
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For example, the *aarch64* Linaro Toolchain, which can be obtained from
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`here <https://releases.linaro.org/components/toolchain/binaries/7.4-2019.02/aarch64-linux-gnu/>`_.
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Alternatively, the Marvell SDK also provides GNU GCC toolchain, which is
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optimized for OCTEON TX2 CPU.
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3. **Rootfile system**
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Any *aarch64* supporting filesystem may be used. For example,
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Ubuntu 15.10 (Wily) or 16.04 LTS (Xenial) userland which can be obtained
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from `<http://cdimage.ubuntu.com/ubuntu-base/releases/16.04/release/ubuntu-base-16.04.1-base-arm64.tar.gz>`_.
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Alternatively, the Marvell SDK provides the buildroot based root filesystem.
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The SDK includes all the above prerequisites necessary to bring up the OCTEON TX2 board.
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- Follow the DPDK :doc:`../linux_gsg/index` to setup the basic DPDK environment.
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Debugging Options
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-----------------
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.. _table_octeontx2_common_debug_options:
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.. table:: OCTEON TX2 common debug options
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+---+------------+-------------------------------------------------------+
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| # | Component | EAL log command |
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+===+============+=======================================================+
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| 1 | Common | --log-level='pmd\.octeontx2\.base,8' |
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+---+------------+-------------------------------------------------------+
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| 2 | Mailbox | --log-level='pmd\.octeontx2\.mbox,8' |
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+---+------------+-------------------------------------------------------+
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Debugfs support
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~~~~~~~~~~~~~~~
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The **OCTEON TX2 Linux kernel driver** provides support to dump RVU blocks
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context or stats using debugfs.
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Enable ``debugfs`` by:
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1. Compile kernel with debugfs enabled, i.e ``CONFIG_DEBUGFS=y``.
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2. Boot OCTEON TX2 with debugfs supported kernel.
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3. Verify ``debugfs`` mounted by default "mount | grep -i debugfs" or mount it manually by using.
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.. code-block:: console
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# mount -t debugfs none /sys/kernel/debug
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Currently ``debugfs`` supports the following RVU blocks NIX, NPA, NPC, NDC,
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SSO & CGX.
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The file structure under ``/sys/kernel/debug`` is as follows
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.. code-block:: console
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octeontx2/
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├── cgx
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│ ├── cgx0
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│ │ └── lmac0
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│ │ └── stats
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│ ├── cgx1
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│ │ ├── lmac0
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│ │ │ └── stats
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│ │ └── lmac1
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│ │ └── stats
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│ └── cgx2
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│ └── lmac0
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│ └── stats
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├── cpt
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│ ├── cpt_engines_info
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│ ├── cpt_engines_sts
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│ ├── cpt_err_info
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│ ├── cpt_lfs_info
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│ └── cpt_pc
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├──── nix
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│ ├── cq_ctx
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│ ├── ndc_rx_cache
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│ ├── ndc_rx_hits_miss
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│ ├── ndc_tx_cache
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│ ├── ndc_tx_hits_miss
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│ ├── qsize
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│ ├── rq_ctx
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│ ├── sq_ctx
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│ └── tx_stall_hwissue
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├── npa
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│ ├── aura_ctx
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│ ├── ndc_cache
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│ ├── ndc_hits_miss
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│ ├── pool_ctx
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│ └── qsize
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├── npc
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│ ├── mcam_info
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│ └── rx_miss_act_stats
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├── rsrc_alloc
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└── sso
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├── hws
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│ └── sso_hws_info
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└── hwgrp
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├── sso_hwgrp_aq_thresh
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├── sso_hwgrp_iaq_walk
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├── sso_hwgrp_pc
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├── sso_hwgrp_free_list_walk
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├── sso_hwgrp_ient_walk
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└── sso_hwgrp_taq_walk
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RVU block LF allocation:
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.. code-block:: console
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cat /sys/kernel/debug/octeontx2/rsrc_alloc
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pcifunc NPA NIX SSO GROUP SSOWS TIM CPT
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PF1 0 0
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PF4 1
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PF13 0, 1 0, 1 0
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CGX example usage:
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.. code-block:: console
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cat /sys/kernel/debug/octeontx2/cgx/cgx2/lmac0/stats
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=======Link Status======
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Link is UP 40000 Mbps
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=======RX_STATS======
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Received packets: 0
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Octets of received packets: 0
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Received PAUSE packets: 0
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Received PAUSE and control packets: 0
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Filtered DMAC0 (NIX-bound) packets: 0
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Filtered DMAC0 (NIX-bound) octets: 0
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Packets dropped due to RX FIFO full: 0
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Octets dropped due to RX FIFO full: 0
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Error packets: 0
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Filtered DMAC1 (NCSI-bound) packets: 0
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Filtered DMAC1 (NCSI-bound) octets: 0
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NCSI-bound packets dropped: 0
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NCSI-bound octets dropped: 0
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=======TX_STATS======
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Packets dropped due to excessive collisions: 0
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Packets dropped due to excessive deferral: 0
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Multiple collisions before successful transmission: 0
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Single collisions before successful transmission: 0
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Total octets sent on the interface: 0
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Total frames sent on the interface: 0
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Packets sent with an octet count < 64: 0
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Packets sent with an octet count == 64: 0
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Packets sent with an octet count of 65127: 0
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Packets sent with an octet count of 128-255: 0
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Packets sent with an octet count of 256-511: 0
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Packets sent with an octet count of 512-1023: 0
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Packets sent with an octet count of 1024-1518: 0
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Packets sent with an octet count of > 1518: 0
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Packets sent to a broadcast DMAC: 0
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Packets sent to the multicast DMAC: 0
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Transmit underflow and were truncated: 0
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Control/PAUSE packets sent: 0
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CPT example usage:
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.. code-block:: console
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cat /sys/kernel/debug/octeontx2/cpt/cpt_pc
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CPT instruction requests 0
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CPT instruction latency 0
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CPT NCB read requests 0
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CPT NCB read latency 0
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CPT read requests caused by UC fills 0
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CPT active cycles pc 1395642
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CPT clock count pc 5579867595493
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NIX example usage:
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.. code-block:: console
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Usage: echo <nixlf> [cq number/all] > /sys/kernel/debug/octeontx2/nix/cq_ctx
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cat /sys/kernel/debug/octeontx2/nix/cq_ctx
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echo 0 0 > /sys/kernel/debug/octeontx2/nix/cq_ctx
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cat /sys/kernel/debug/octeontx2/nix/cq_ctx
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=====cq_ctx for nixlf:0 and qidx:0 is=====
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W0: base 158ef1a00
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W1: wrptr 0
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W1: avg_con 0
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W1: cint_idx 0
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W1: cq_err 0
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W1: qint_idx 0
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W1: bpid 0
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W1: bp_ena 0
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W2: update_time 31043
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W2:avg_level 255
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W2: head 0
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W2:tail 0
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W3: cq_err_int_ena 5
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W3:cq_err_int 0
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W3: qsize 4
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W3:caching 1
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W3: substream 0x000
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W3: ena 1
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W3: drop_ena 1
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W3: drop 64
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W3: bp 0
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NPA example usage:
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.. code-block:: console
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Usage: echo <npalf> [pool number/all] > /sys/kernel/debug/octeontx2/npa/pool_ctx
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cat /sys/kernel/debug/octeontx2/npa/pool_ctx
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echo 0 0 > /sys/kernel/debug/octeontx2/npa/pool_ctx
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cat /sys/kernel/debug/octeontx2/npa/pool_ctx
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======POOL : 0=======
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W0: Stack base 1375bff00
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W1: ena 1
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W1: nat_align 1
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W1: stack_caching 1
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W1: stack_way_mask 0
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W1: buf_offset 1
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W1: buf_size 19
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W2: stack_max_pages 24315
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W2: stack_pages 24314
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W3: op_pc 267456
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W4: stack_offset 2
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W4: shift 5
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W4: avg_level 255
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W4: avg_con 0
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W4: fc_ena 0
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W4: fc_stype 0
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W4: fc_hyst_bits 0
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W4: fc_up_crossing 0
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W4: update_time 62993
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W5: fc_addr 0
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W6: ptr_start 1593adf00
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W7: ptr_end 180000000
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W8: err_int 0
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W8: err_int_ena 7
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W8: thresh_int 0
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W8: thresh_int_ena 0
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W8: thresh_up 0
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W8: thresh_qint_idx 0
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W8: err_qint_idx 0
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NPC example usage:
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.. code-block:: console
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cat /sys/kernel/debug/octeontx2/npc/mcam_info
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NPC MCAM info:
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RX keywidth : 224bits
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TX keywidth : 224bits
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MCAM entries : 2048
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Reserved : 158
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Available : 1890
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MCAM counters : 512
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Reserved : 1
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Available : 511
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SSO example usage:
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.. code-block:: console
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Usage: echo [<hws>/all] > /sys/kernel/debug/octeontx2/sso/hws/sso_hws_info
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echo 0 > /sys/kernel/debug/octeontx2/sso/hws/sso_hws_info
|
||||
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||||
==================================================
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SSOW HWS[0] Arbitration State 0x0
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SSOW HWS[0] Guest Machine Control 0x0
|
||||
SSOW HWS[0] SET[0] Group Mask[0] 0xffffffffffffffff
|
||||
SSOW HWS[0] SET[0] Group Mask[1] 0xffffffffffffffff
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||||
SSOW HWS[0] SET[0] Group Mask[2] 0xffffffffffffffff
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||||
SSOW HWS[0] SET[0] Group Mask[3] 0xffffffffffffffff
|
||||
SSOW HWS[0] SET[1] Group Mask[0] 0xffffffffffffffff
|
||||
SSOW HWS[0] SET[1] Group Mask[1] 0xffffffffffffffff
|
||||
SSOW HWS[0] SET[1] Group Mask[2] 0xffffffffffffffff
|
||||
SSOW HWS[0] SET[1] Group Mask[3] 0xffffffffffffffff
|
||||
==================================================
|
||||
|
||||
Compile DPDK
|
||||
------------
|
||||
|
||||
DPDK may be compiled either natively on OCTEON TX2 platform or cross-compiled on
|
||||
an x86 based platform.
|
||||
|
||||
Native Compilation
|
||||
~~~~~~~~~~~~~~~~~~
|
||||
|
||||
make build
|
||||
^^^^^^^^^^
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
make config T=arm64-octeontx2-linux-gcc
|
||||
make -j
|
||||
|
||||
The example applications can be compiled using the following:
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
cd <dpdk directory>
|
||||
export RTE_SDK=$PWD
|
||||
export RTE_TARGET=build
|
||||
cd examples/<application>
|
||||
make -j
|
||||
|
||||
meson build
|
||||
^^^^^^^^^^^
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
meson build
|
||||
ninja -C build
|
||||
|
||||
Cross Compilation
|
||||
~~~~~~~~~~~~~~~~~
|
||||
|
||||
Refer to :doc:`../linux_gsg/cross_build_dpdk_for_arm64` for generic arm64 details.
|
||||
|
||||
make build
|
||||
^^^^^^^^^^
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
make config T=arm64-octeontx2-linux-gcc
|
||||
make -j CROSS=aarch64-marvell-linux-gnu- CONFIG_RTE_KNI_KMOD=n
|
||||
|
||||
meson build
|
||||
^^^^^^^^^^^
|
||||
|
||||
.. code-block:: console
|
||||
|
||||
meson build --cross-file config/arm/arm64_octeontx2_linux_gcc
|
||||
ninja -C build
|
||||
|
||||
.. note::
|
||||
|
||||
By default, meson cross compilation uses ``aarch64-linux-gnu-gcc`` toolchain,
|
||||
if Marvell toolchain is available then it can be used by overriding the
|
||||
c, cpp, ar, strip ``binaries`` attributes to respective Marvell
|
||||
toolchain binaries in ``config/arm/arm64_octeontx2_linux_gcc`` file.
|
||||
Loading…
Reference in New Issue
Block a user