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eal: fix cpuflags for latest microarch

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Ensure that support for AVX2, HLE and RTM works with cpuflags.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
This commit is contained in:
Bruce Richardson 2014-02-11 15:38:29 +00:00 committed by David Marchand
parent a3fd610463
commit 16a6a44761
2 changed files with 5 additions and 1 deletions
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4
lib/librte_eal/common/eal_common_cpuflags.c
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@ -161,11 +161,13 @@ static const struct feature_entry cpu_feature_table[] = {
{FEAT_DEF(FSGSBASE), {0x7, 0, 0, 0, REG_EBX}, 0x00000001},
{FEAT_DEF(BMI1), {0x7, 0, 0, 0, REG_EBX}, 0x00000004},
{FEAT_DEF(AVX2), {0x7, 0, 0, 0, REG_EBX}, 0x00000010},
{FEAT_DEF(HLE), {0x7, 0, 0, 0, REG_EBX}, 0x00000010},
{FEAT_DEF(AVX2), {0x7, 0, 0, 0, REG_EBX}, 0x00000020},
{FEAT_DEF(SMEP), {0x7, 0, 0, 0, REG_EBX}, 0x00000040},
{FEAT_DEF(BMI2), {0x7, 0, 0, 0, REG_EBX}, 0x00000080},
{FEAT_DEF(ERMS), {0x7, 0, 0, 0, REG_EBX}, 0x00000100},
{FEAT_DEF(INVPCID), {0x7, 0, 0, 0, REG_EBX}, 0x00000400},
{FEAT_DEF(RTM), {0x7, 0, 0, 0, REG_EBX}, 0x00000800},
{FEAT_DEF(LAHF_SAHF), {0x80000001, 0, 0, 0, REG_ECX}, 0x00000001},
{FEAT_DEF(LZCNT), {0x80000001, 0, 0, 0, REG_ECX}, 0x00000010},

2
lib/librte_eal/common/include/rte_cpuflags.h
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@ -126,11 +126,13 @@ enum rte_cpu_flag_t {
/* (EAX 07h, ECX 0h) EBX features */
RTE_CPUFLAG_FSGSBASE, /**< FSGSBASE */
RTE_CPUFLAG_BMI1, /**< BMI1 */
RTE_CPUFLAG_HLE, /**< Hardware Lock elision */
RTE_CPUFLAG_AVX2, /**< AVX2 */
RTE_CPUFLAG_SMEP, /**< SMEP */
RTE_CPUFLAG_BMI2, /**< BMI2 */
RTE_CPUFLAG_ERMS, /**< ERMS */
RTE_CPUFLAG_INVPCID, /**< INVPCID */
RTE_CPUFLAG_RTM, /**< Transactional memory */
/* (EAX 80000001h) ECX features */
RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */