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i40e: disable setting of PHY configuration

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There was a known link issue on 40G ports on NVM version (FVL3E),
when setting phy configuration. As a workaround, setting of phy
configuration should be disabled. The impact is that the link cannot
be forcedly configured, which doesn't affect any feature functions.
The workaround can be removed when a formal fix is ready later.

Test report: http://www.dpdk.org/ml/archives/dev/2015-May/017384.html

Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Jijiang Liu <jijiang.liu@intel.com>
Tested-by: Min Cao <min.cao@intel.com>
This commit is contained in:
Helin Zhang 2015-04-30 23:03:08 +08:00 committed by Thomas Monjalon
parent 6796db6f22
commit 16c979f9ad
1 changed files with 4 additions and 0 deletions
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4
lib/librte_pmd_i40e/i40e_ethdev.c
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@ -791,6 +791,10 @@ i40e_phy_conf_link(struct i40e_hw *hw, uint8_t abilities, uint8_t force_speed)
I40E_LINK_SPEED_100MB;
int ret = -ENOTSUP;
/* Skip it on 40G interfaces, as a workaround for the link issue */
if (i40e_is_40G_device(hw->device_id))
return I40E_SUCCESS;
status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_ab,
NULL);
if (status)