net/ixgbe: remove memory barrier from NEON Rx
The memory barrier was intended for descriptor data integrity (see comments in [1]). As later NEON loads were implemented and a whole entry is loaded in one-run and atomic, that makes the ordering of partial loading unnecessary. Remove it accordingly. Corrected couple of code comments. In terms of performance, observed slightly higher average throughput in tests with 82599ES NIC. [1] http://patches.dpdk.org/patch/18153/ Fixes: 989a84050542 ("net/ixgbe: fix received packets number for ARM NEON") Cc: stable@dpdk.org Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com>
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@ -214,13 +214,13 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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uint32_t var = 0;
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uint32_t stat;
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/* B.1 load 1 mbuf point */
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/* B.1 load 2 mbuf point */
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mbp1 = vld1q_u64((uint64_t *)&sw_ring[pos]);
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/* B.2 copy 2 mbuf point into rx_pkts */
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vst1q_u64((uint64_t *)&rx_pkts[pos], mbp1);
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/* B.1 load 1 mbuf point */
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/* B.1 load 2 mbuf point */
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mbp2 = vld1q_u64((uint64_t *)&sw_ring[pos + 2]);
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/* A. load 4 pkts descs */
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@ -228,7 +228,6 @@ _recv_raw_pkts_vec(struct ixgbe_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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descs[1] = vld1q_u64((uint64_t *)(rxdp + 1));
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descs[2] = vld1q_u64((uint64_t *)(rxdp + 2));
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descs[3] = vld1q_u64((uint64_t *)(rxdp + 3));
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rte_smp_rmb();
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/* B.2 copy 2 mbuf point into rx_pkts */
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vst1q_u64((uint64_t *)&rx_pkts[pos + 2], mbp2);
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