net/bnxt: support get/set EEPROM
Add support for get/set_eeprom, get_eeprom_length dev_ops. Defined the structures required to get/set the eeprom length/data in hsi_struct_defs hdr file along with implementation. Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com> Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
This commit is contained in:
Somnath Kotur
Ferruh Yigit
parent
3d2a6644eb
commit
19e6af01bb
@ -22,6 +22,7 @@ Tx descriptor status = Y
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Basic stats = Y
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Extended stats = Y
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FW version = Y
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EEPROM dump = Y
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LED = Y
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Linux UIO = Y
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Linux VFIO = Y
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@ -53,6 +53,7 @@
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#include "bnxt_txr.h"
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#include "bnxt_vnic.h"
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#include "hsi_struct_def_dpdk.h"
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#include "bnxt_nvm_defs.h"
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#define DRV_MODULE_NAME "bnxt"
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static const char bnxt_version[] =
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@ -1854,6 +1855,142 @@ bnxt_dev_supported_ptypes_get_op(struct rte_eth_dev *dev)
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}
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static int
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bnxt_get_eeprom_length_op(struct rte_eth_dev *dev)
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{
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struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
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int rc;
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uint32_t dir_entries;
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uint32_t entry_length;
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RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x\n",
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__func__, bp->pdev->addr.domain, bp->pdev->addr.bus,
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bp->pdev->addr.devid, bp->pdev->addr.function);
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rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
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if (rc != 0)
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return rc;
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return dir_entries * entry_length;
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}
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static int
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bnxt_get_eeprom_op(struct rte_eth_dev *dev,
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struct rte_dev_eeprom_info *in_eeprom)
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{
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struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
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uint32_t index;
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uint32_t offset;
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RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
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"len = %d\n", __func__, bp->pdev->addr.domain,
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bp->pdev->addr.bus, bp->pdev->addr.devid,
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bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
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if (in_eeprom->offset == 0) /* special offset value to get directory */
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return bnxt_get_nvram_directory(bp, in_eeprom->length,
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in_eeprom->data);
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index = in_eeprom->offset >> 24;
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offset = in_eeprom->offset & 0xffffff;
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if (index != 0)
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return bnxt_hwrm_get_nvram_item(bp, index - 1, offset,
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in_eeprom->length, in_eeprom->data);
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return 0;
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}
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static bool bnxt_dir_type_is_ape_bin_format(uint16_t dir_type)
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{
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switch (dir_type) {
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case BNX_DIR_TYPE_CHIMP_PATCH:
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case BNX_DIR_TYPE_BOOTCODE:
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case BNX_DIR_TYPE_BOOTCODE_2:
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case BNX_DIR_TYPE_APE_FW:
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case BNX_DIR_TYPE_APE_PATCH:
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case BNX_DIR_TYPE_KONG_FW:
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case BNX_DIR_TYPE_KONG_PATCH:
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case BNX_DIR_TYPE_BONO_FW:
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case BNX_DIR_TYPE_BONO_PATCH:
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return true;
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}
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return false;
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}
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static bool bnxt_dir_type_is_other_exec_format(uint16_t dir_type)
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{
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switch (dir_type) {
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case BNX_DIR_TYPE_AVS:
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case BNX_DIR_TYPE_EXP_ROM_MBA:
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case BNX_DIR_TYPE_PCIE:
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case BNX_DIR_TYPE_TSCF_UCODE:
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case BNX_DIR_TYPE_EXT_PHY:
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case BNX_DIR_TYPE_CCM:
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case BNX_DIR_TYPE_ISCSI_BOOT:
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case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
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case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
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return true;
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}
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return false;
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}
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static bool bnxt_dir_type_is_executable(uint16_t dir_type)
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{
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return bnxt_dir_type_is_ape_bin_format(dir_type) ||
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bnxt_dir_type_is_other_exec_format(dir_type);
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}
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static int
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bnxt_set_eeprom_op(struct rte_eth_dev *dev,
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struct rte_dev_eeprom_info *in_eeprom)
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{
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struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
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uint8_t index, dir_op;
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uint16_t type, ext, ordinal, attr;
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RTE_LOG(INFO, PMD, "%s(): %04x:%02x:%02x:%02x in_eeprom->offset = %d "
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"len = %d\n", __func__, bp->pdev->addr.domain,
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bp->pdev->addr.bus, bp->pdev->addr.devid,
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bp->pdev->addr.function, in_eeprom->offset, in_eeprom->length);
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if (!BNXT_PF(bp)) {
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RTE_LOG(ERR, PMD, "NVM write not supported from a VF\n");
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return -EINVAL;
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}
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type = in_eeprom->magic >> 16;
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if (type == 0xffff) { /* special value for directory operations */
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index = in_eeprom->magic & 0xff;
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dir_op = in_eeprom->magic >> 8;
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if (index == 0)
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return -EINVAL;
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switch (dir_op) {
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case 0x0e: /* erase */
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if (in_eeprom->offset != ~in_eeprom->magic)
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return -EINVAL;
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return bnxt_hwrm_erase_nvram_directory(bp, index - 1);
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default:
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return -EINVAL;
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}
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}
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/* Create or re-write an NVM item: */
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if (bnxt_dir_type_is_executable(type) == true)
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return -EOPNOTSUPP;
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ext = in_eeprom->magic & 0xffff;
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ordinal = in_eeprom->offset >> 16;
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attr = in_eeprom->offset & 0xffff;
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return bnxt_hwrm_flash_nvram(bp, type, ordinal, ext, attr,
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in_eeprom->data, in_eeprom->length);
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return 0;
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}
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/*
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* Initialization
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*/
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@ -1908,6 +2045,9 @@ static const struct eth_dev_ops bnxt_dev_ops = {
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.tx_descriptor_status = bnxt_tx_descriptor_status_op,
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.filter_ctrl = bnxt_filter_ctrl_op,
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.dev_supported_ptypes_get = bnxt_dev_supported_ptypes_get_op,
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.get_eeprom_length = bnxt_get_eeprom_length_op,
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.get_eeprom = bnxt_get_eeprom_op,
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.set_eeprom = bnxt_set_eeprom_op,
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};
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static bool bnxt_vf_pciid(uint16_t id)
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@ -2975,6 +2975,167 @@ int bnxt_hwrm_port_led_cfg(struct bnxt *bp, bool led_on)
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return rc;
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}
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int bnxt_hwrm_nvm_get_dir_info(struct bnxt *bp, uint32_t *entries,
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uint32_t *length)
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{
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int rc;
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struct hwrm_nvm_get_dir_info_input req = {0};
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struct hwrm_nvm_get_dir_info_output *resp = bp->hwrm_cmd_resp_addr;
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HWRM_PREP(req, NVM_GET_DIR_INFO);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT();
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HWRM_UNLOCK();
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if (!rc) {
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*entries = rte_le_to_cpu_32(resp->entries);
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*length = rte_le_to_cpu_32(resp->entry_length);
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}
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return rc;
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}
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int bnxt_get_nvram_directory(struct bnxt *bp, uint32_t len, uint8_t *data)
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{
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int rc;
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uint32_t dir_entries;
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uint32_t entry_length;
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uint8_t *buf;
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size_t buflen;
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phys_addr_t dma_handle;
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struct hwrm_nvm_get_dir_entries_input req = {0};
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struct hwrm_nvm_get_dir_entries_output *resp = bp->hwrm_cmd_resp_addr;
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rc = bnxt_hwrm_nvm_get_dir_info(bp, &dir_entries, &entry_length);
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if (rc != 0)
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return rc;
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*data++ = dir_entries;
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*data++ = entry_length;
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len -= 2;
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memset(data, 0xff, len);
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buflen = dir_entries * entry_length;
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buf = rte_malloc("nvm_dir", buflen, 0);
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rte_mem_lock_page(buf);
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if (buf == NULL)
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return -ENOMEM;
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dma_handle = rte_mem_virt2phy(buf);
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if (dma_handle == 0) {
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RTE_LOG(ERR, PMD,
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"unable to map response address to physical memory\n");
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return -ENOMEM;
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}
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HWRM_PREP(req, NVM_GET_DIR_ENTRIES);
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req.host_dest_addr = rte_cpu_to_le_64(dma_handle);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT();
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HWRM_UNLOCK();
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if (rc == 0)
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memcpy(data, buf, len > buflen ? buflen : len);
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rte_free(buf);
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return rc;
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}
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int bnxt_hwrm_get_nvram_item(struct bnxt *bp, uint32_t index,
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uint32_t offset, uint32_t length,
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uint8_t *data)
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{
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int rc;
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uint8_t *buf;
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phys_addr_t dma_handle;
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struct hwrm_nvm_read_input req = {0};
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struct hwrm_nvm_read_output *resp = bp->hwrm_cmd_resp_addr;
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buf = rte_malloc("nvm_item", length, 0);
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rte_mem_lock_page(buf);
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if (!buf)
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return -ENOMEM;
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dma_handle = rte_mem_virt2phy(buf);
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if (dma_handle == 0) {
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RTE_LOG(ERR, PMD,
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"unable to map response address to physical memory\n");
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return -ENOMEM;
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}
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HWRM_PREP(req, NVM_READ);
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req.host_dest_addr = rte_cpu_to_le_64(dma_handle);
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req.dir_idx = rte_cpu_to_le_16(index);
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req.offset = rte_cpu_to_le_32(offset);
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req.len = rte_cpu_to_le_32(length);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT();
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HWRM_UNLOCK();
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if (rc == 0)
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memcpy(data, buf, length);
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rte_free(buf);
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return rc;
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}
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int bnxt_hwrm_erase_nvram_directory(struct bnxt *bp, uint8_t index)
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{
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int rc;
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struct hwrm_nvm_erase_dir_entry_input req = {0};
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struct hwrm_nvm_erase_dir_entry_output *resp = bp->hwrm_cmd_resp_addr;
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HWRM_PREP(req, NVM_ERASE_DIR_ENTRY);
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req.dir_idx = rte_cpu_to_le_16(index);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT();
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HWRM_UNLOCK();
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return rc;
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}
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int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type,
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uint16_t dir_ordinal, uint16_t dir_ext,
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uint16_t dir_attr, const uint8_t *data,
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size_t data_len)
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{
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int rc;
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struct hwrm_nvm_write_input req = {0};
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struct hwrm_nvm_write_output *resp = bp->hwrm_cmd_resp_addr;
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phys_addr_t dma_handle;
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uint8_t *buf;
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HWRM_PREP(req, NVM_WRITE);
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req.dir_type = rte_cpu_to_le_16(dir_type);
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req.dir_ordinal = rte_cpu_to_le_16(dir_ordinal);
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req.dir_ext = rte_cpu_to_le_16(dir_ext);
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req.dir_attr = rte_cpu_to_le_16(dir_attr);
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req.dir_data_length = rte_cpu_to_le_32(data_len);
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buf = rte_malloc("nvm_write", data_len, 0);
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rte_mem_lock_page(buf);
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if (!buf)
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return -ENOMEM;
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dma_handle = rte_mem_virt2phy(buf);
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if (dma_handle == 0) {
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RTE_LOG(ERR, PMD,
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"unable to map response address to physical memory\n");
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return -ENOMEM;
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}
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memcpy(buf, data, data_len);
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req.host_src_addr = rte_cpu_to_le_64(dma_handle);
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rc = bnxt_hwrm_send_message(bp, &req, sizeof(req));
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HWRM_CHECK_RESULT();
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HWRM_UNLOCK();
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rte_free(buf);
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return rc;
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}
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static void
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bnxt_vnic_count(struct bnxt_vnic_info *vnic __rte_unused, void *cbdata)
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{
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@ -164,4 +164,15 @@ int bnxt_hwrm_set_ntuple_filter(struct bnxt *bp, uint16_t dst_id,
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struct bnxt_filter_info *filter);
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int bnxt_hwrm_clear_ntuple_filter(struct bnxt *bp,
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struct bnxt_filter_info *filter);
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int bnxt_get_nvram_directory(struct bnxt *bp, uint32_t len, uint8_t *data);
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int bnxt_hwrm_nvm_get_dir_info(struct bnxt *bp, uint32_t *entries,
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uint32_t *length);
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int bnxt_hwrm_get_nvram_item(struct bnxt *bp, uint32_t index,
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uint32_t offset, uint32_t length,
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uint8_t *data);
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int bnxt_hwrm_erase_nvram_directory(struct bnxt *bp, uint8_t index);
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int bnxt_hwrm_flash_nvram(struct bnxt *bp, uint16_t dir_type,
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uint16_t dir_ordinal, uint16_t dir_ext,
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uint16_t dir_attr, const uint8_t *data,
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size_t data_len);
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#endif
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75
drivers/net/bnxt/bnxt_nvm_defs.h
Normal file
75
drivers/net/bnxt/bnxt_nvm_defs.h
Normal file
@ -0,0 +1,75 @@
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/* Broadcom NetXtreme-C/E network driver.
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*
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* Copyright (c) 2014-2016 Broadcom Corporation
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* Copyright (c) 2016-2017 Broadcom Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation.
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*/
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#ifndef _BNXT_NVM_DEFS_H_
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#define _BNXT_NVM_DEFS_H_
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enum bnxt_nvm_directory_type {
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BNX_DIR_TYPE_UNUSED = 0,
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BNX_DIR_TYPE_PKG_LOG = 1,
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BNX_DIR_TYPE_UPDATE = 2,
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BNX_DIR_TYPE_CHIMP_PATCH = 3,
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BNX_DIR_TYPE_BOOTCODE = 4,
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BNX_DIR_TYPE_VPD = 5,
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BNX_DIR_TYPE_EXP_ROM_MBA = 6,
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BNX_DIR_TYPE_AVS = 7,
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BNX_DIR_TYPE_PCIE = 8,
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BNX_DIR_TYPE_PORT_MACRO = 9,
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BNX_DIR_TYPE_APE_FW = 10,
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BNX_DIR_TYPE_APE_PATCH = 11,
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BNX_DIR_TYPE_KONG_FW = 12,
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BNX_DIR_TYPE_KONG_PATCH = 13,
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BNX_DIR_TYPE_BONO_FW = 14,
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BNX_DIR_TYPE_BONO_PATCH = 15,
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BNX_DIR_TYPE_TANG_FW = 16,
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BNX_DIR_TYPE_TANG_PATCH = 17,
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BNX_DIR_TYPE_BOOTCODE_2 = 18,
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BNX_DIR_TYPE_CCM = 19,
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BNX_DIR_TYPE_PCI_CFG = 20,
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BNX_DIR_TYPE_TSCF_UCODE = 21,
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BNX_DIR_TYPE_ISCSI_BOOT = 22,
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BNX_DIR_TYPE_ISCSI_BOOT_IPV6 = 24,
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BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6 = 25,
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BNX_DIR_TYPE_ISCSI_BOOT_CFG6 = 26,
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BNX_DIR_TYPE_EXT_PHY = 27,
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BNX_DIR_TYPE_SHARED_CFG = 40,
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BNX_DIR_TYPE_PORT_CFG = 41,
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BNX_DIR_TYPE_FUNC_CFG = 42,
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BNX_DIR_TYPE_MGMT_CFG = 48,
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BNX_DIR_TYPE_MGMT_DATA = 49,
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BNX_DIR_TYPE_MGMT_WEB_DATA = 50,
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BNX_DIR_TYPE_MGMT_WEB_META = 51,
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BNX_DIR_TYPE_MGMT_EVENT_LOG = 52,
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BNX_DIR_TYPE_MGMT_AUDIT_LOG = 53
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};
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#define BNX_DIR_ORDINAL_FIRST 0
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#define BNX_DIR_EXT_NONE 0
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#define BNX_DIR_EXT_INACTIVE (1 << 0)
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#define BNX_DIR_EXT_UPDATE (1 << 1)
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#define BNX_DIR_ATTR_NONE 0
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#define BNX_DIR_ATTR_NO_CHKSUM (1 << 0)
|
||||
#define BNX_DIR_ATTR_PROP_STREAM (1 << 1)
|
||||
|
||||
#define BNX_PKG_LOG_MAX_LENGTH 4096
|
||||
|
||||
enum bnxnvm_pkglog_field_index {
|
||||
BNX_PKG_LOG_FIELD_IDX_INSTALLED_TIMESTAMP = 0,
|
||||
BNX_PKG_LOG_FIELD_IDX_PKG_DESCRIPTION = 1,
|
||||
BNX_PKG_LOG_FIELD_IDX_PKG_VERSION = 2,
|
||||
BNX_PKG_LOG_FIELD_IDX_PKG_TIMESTAMP = 3,
|
||||
BNX_PKG_LOG_FIELD_IDX_PKG_CHECKSUM = 4,
|
||||
BNX_PKG_LOG_FIELD_IDX_INSTALLED_ITEMS = 5,
|
||||
BNX_PKG_LOG_FIELD_IDX_INSTALLED_MASK = 6
|
||||
};
|
||||
|
||||
#endif /* Don't add anything after this line */
|
||||
@ -11315,6 +11315,144 @@ struct hwrm_reject_fwd_resp_output {
|
||||
*/
|
||||
} __attribute__((packed));
|
||||
|
||||
/* hwrm_nvm_get_dir_entries */
|
||||
/* Input (24 bytes) */
|
||||
struct hwrm_nvm_get_dir_entries_input {
|
||||
uint16_t req_type;
|
||||
uint16_t cmpl_ring;
|
||||
uint16_t seq_id;
|
||||
uint16_t target_id;
|
||||
uint64_t resp_addr;
|
||||
uint64_t host_dest_addr;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Output (16 bytes) */
|
||||
struct hwrm_nvm_get_dir_entries_output {
|
||||
uint16_t error_code;
|
||||
uint16_t req_type;
|
||||
uint16_t seq_id;
|
||||
uint16_t resp_len;
|
||||
uint32_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
uint8_t valid;
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
/* hwrm_nvm_erase_dir_entry */
|
||||
/* Input (24 bytes) */
|
||||
struct hwrm_nvm_erase_dir_entry_input {
|
||||
uint16_t req_type;
|
||||
uint16_t cmpl_ring;
|
||||
uint16_t seq_id;
|
||||
uint16_t target_id;
|
||||
uint64_t resp_addr;
|
||||
uint16_t dir_idx;
|
||||
uint16_t unused_0[3];
|
||||
};
|
||||
|
||||
/* Output (16 bytes) */
|
||||
struct hwrm_nvm_erase_dir_entry_output {
|
||||
uint16_t error_code;
|
||||
uint16_t req_type;
|
||||
uint16_t seq_id;
|
||||
uint16_t resp_len;
|
||||
uint32_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
uint8_t valid;
|
||||
};
|
||||
|
||||
/* hwrm_nvm_get_dir_info */
|
||||
/* Input (16 bytes) */
|
||||
struct hwrm_nvm_get_dir_info_input {
|
||||
uint16_t req_type;
|
||||
uint16_t cmpl_ring;
|
||||
uint16_t seq_id;
|
||||
uint16_t target_id;
|
||||
uint64_t resp_addr;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Output (24 bytes) */
|
||||
struct hwrm_nvm_get_dir_info_output {
|
||||
uint16_t error_code;
|
||||
uint16_t req_type;
|
||||
uint16_t seq_id;
|
||||
uint16_t resp_len;
|
||||
uint32_t entries;
|
||||
uint32_t entry_length;
|
||||
uint32_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
uint8_t valid;
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
/* hwrm_nvm_write */
|
||||
/* Input (48 bytes) */
|
||||
struct hwrm_nvm_write_input {
|
||||
uint16_t req_type;
|
||||
uint16_t cmpl_ring;
|
||||
uint16_t seq_id;
|
||||
uint16_t target_id;
|
||||
uint64_t resp_addr;
|
||||
uint64_t host_src_addr;
|
||||
uint16_t dir_type;
|
||||
uint16_t dir_ordinal;
|
||||
uint16_t dir_ext;
|
||||
uint16_t dir_attr;
|
||||
uint32_t dir_data_length;
|
||||
uint16_t option;
|
||||
uint16_t flags;
|
||||
#define NVM_WRITE_REQ_FLAGS_KEEP_ORIG_ACTIVE_IMG 0x1UL
|
||||
uint32_t dir_item_length;
|
||||
uint32_t unused_0;
|
||||
};
|
||||
|
||||
/* Output (16 bytes) */
|
||||
struct hwrm_nvm_write_output {
|
||||
uint16_t error_code;
|
||||
uint16_t req_type;
|
||||
uint16_t seq_id;
|
||||
uint16_t resp_len;
|
||||
uint32_t dir_item_length;
|
||||
uint16_t dir_idx;
|
||||
uint8_t unused_0;
|
||||
uint8_t valid;
|
||||
};
|
||||
/* hwrm_nvm_read */
|
||||
/* Input (40 bytes) */
|
||||
struct hwrm_nvm_read_input {
|
||||
uint16_t req_type;
|
||||
uint16_t cmpl_ring;
|
||||
uint16_t seq_id;
|
||||
uint16_t target_id;
|
||||
uint64_t resp_addr;
|
||||
uint64_t host_dest_addr;
|
||||
uint16_t dir_idx;
|
||||
uint8_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint32_t offset;
|
||||
uint32_t len;
|
||||
uint32_t unused_2;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Output (16 bytes) */
|
||||
struct hwrm_nvm_read_output {
|
||||
uint16_t error_code;
|
||||
uint16_t req_type;
|
||||
uint16_t seq_id;
|
||||
uint16_t resp_len;
|
||||
uint32_t unused_0;
|
||||
uint8_t unused_1;
|
||||
uint8_t unused_2;
|
||||
uint8_t unused_3;
|
||||
uint8_t valid;
|
||||
} __attribute__((packed));
|
||||
|
||||
/* Hardware Resource Manager Specification */
|
||||
/* Description: This structure is used to specify port description. */
|
||||
/*
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user