table: separate out x86-specific from LRU header
* Moved all x86 related lru defines to rte_lru_x86.h while retaining all common defines in rte_lru.h * Verified the changes with table_autotest unit test case Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
This commit is contained in:
Ashwin Sekhar T K
Thomas Monjalon
parent
3f98dd87d2
commit
1e29a16248
@ -69,6 +69,9 @@ SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_table_acl.h
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endif
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SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_table_hash.h
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SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_lru.h
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ifeq ($(CONFIG_RTE_ARCH_X86),y)
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SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_lru_x86.h
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endif
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SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_table_array.h
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SYMLINK-$(CONFIG_RTE_LIBRTE_TABLE)-include += rte_table_stub.h
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@ -38,31 +38,13 @@
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extern "C" {
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#endif
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#include <stdint.h>
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#ifdef __INTEL_COMPILER
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#define GCC_VERSION (0)
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#ifdef RTE_ARCH_X86_64
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#include "rte_lru_x86.h"
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#else
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#define GCC_VERSION (__GNUC__ * 10000+__GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
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#endif
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#ifndef RTE_TABLE_HASH_LRU_STRATEGY
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#ifdef __SSE4_2__
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#define RTE_TABLE_HASH_LRU_STRATEGY 2
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#else /* if no SSE, use simple scalar version */
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#define RTE_TABLE_HASH_LRU_STRATEGY 1
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#endif
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#endif
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#ifndef RTE_ARCH_X86_64
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#undef RTE_TABLE_HASH_LRU_STRATEGY
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#define RTE_TABLE_HASH_LRU_STRATEGY 1
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#endif
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#if (RTE_TABLE_HASH_LRU_STRATEGY < 0) || (RTE_TABLE_HASH_LRU_STRATEGY > 3)
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#error Invalid value for RTE_TABLE_HASH_LRU_STRATEGY
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#endif
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#if RTE_TABLE_HASH_LRU_STRATEGY == 0
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#define lru_init(bucket) \
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@ -118,87 +100,11 @@ do { \
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bucket->lru_list = x; \
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} while (0)
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#elif RTE_TABLE_HASH_LRU_STRATEGY == 2
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#elif (RTE_TABLE_HASH_LRU_STRATEGY == 2) || (RTE_TABLE_HASH_LRU_STRATEGY == 3)
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#if GCC_VERSION > 40306
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#include <x86intrin.h>
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#else
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include <xmmintrin.h>
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#endif
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#define lru_init(bucket) \
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do \
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bucket->lru_list = 0x0000000100020003LLU; \
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while (0)
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#define lru_pos(bucket) (bucket->lru_list & 0xFFFFLLU)
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#define lru_update(bucket, mru_val) \
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do { \
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/* set up the masks for all possible shuffles, depends on pos */\
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static uint64_t masks[10] = { \
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/* Shuffle order; Make Zero (see _mm_shuffle_epi8 manual) */\
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0x0100070605040302, 0x8080808080808080, \
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0x0302070605040100, 0x8080808080808080, \
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0x0504070603020100, 0x8080808080808080, \
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0x0706050403020100, 0x8080808080808080, \
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0x0706050403020100, 0x8080808080808080}; \
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/* load up one register with repeats of mru-val */ \
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uint64_t mru2 = mru_val; \
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uint64_t mru3 = mru2 | (mru2 << 16); \
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uint64_t lru = bucket->lru_list; \
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/* XOR to cause the word we're looking for to go to zero */ \
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uint64_t mru = lru ^ ((mru3 << 32) | mru3); \
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__m128i c = _mm_cvtsi64_si128(mru); \
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__m128i b = _mm_cvtsi64_si128(lru); \
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/* Find the minimum value (first zero word, if it's in there) */\
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__m128i d = _mm_minpos_epu16(c); \
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/* Second word is the index to found word (first word is the value) */\
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unsigned pos = _mm_extract_epi16(d, 1); \
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/* move the recently used location to top of list */ \
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__m128i k = _mm_shuffle_epi8(b, *((__m128i *) &masks[2 * pos]));\
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/* Finally, update the original list with the reordered data */ \
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bucket->lru_list = _mm_extract_epi64(k, 0); \
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/* Phwew! */ \
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} while (0)
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#elif RTE_TABLE_HASH_LRU_STRATEGY == 3
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#if GCC_VERSION > 40306
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#include <x86intrin.h>
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#else
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include <xmmintrin.h>
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#endif
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#define lru_init(bucket) \
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do \
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bucket->lru_list = ~0LLU; \
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while (0)
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static inline int
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f_lru_pos(uint64_t lru_list)
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{
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__m128i lst = _mm_set_epi64x((uint64_t)-1, lru_list);
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__m128i min = _mm_minpos_epu16(lst);
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return _mm_extract_epi16(min, 1);
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}
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#define lru_pos(bucket) f_lru_pos(bucket->lru_list)
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#define lru_update(bucket, mru_val) \
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do { \
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const uint64_t orvals[] = {0xFFFFLLU, 0xFFFFLLU << 16, \
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0xFFFFLLU << 32, 0xFFFFLLU << 48, 0LLU}; \
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const uint64_t decs[] = {0x1000100010001LLU, 0}; \
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__m128i lru = _mm_cvtsi64_si128(bucket->lru_list); \
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__m128i vdec = _mm_cvtsi64_si128(decs[mru_val>>2]); \
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lru = _mm_subs_epu16(lru, vdec); \
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bucket->lru_list = _mm_extract_epi64(lru, 0) | orvals[mru_val]; \
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} while (0)
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/**
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* These strategies are implemented in architecture specific header files.
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*/
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#else
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140
lib/librte_table/rte_lru_x86.h
Normal file
140
lib/librte_table/rte_lru_x86.h
Normal file
@ -0,0 +1,140 @@
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/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __INCLUDE_RTE_LRU_X86_H__
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#define __INCLUDE_RTE_LRU_X86_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#ifdef __INTEL_COMPILER
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#define GCC_VERSION (0)
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#else
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#define GCC_VERSION (__GNUC__ * 10000+__GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
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#endif
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#ifndef RTE_TABLE_HASH_LRU_STRATEGY
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#ifdef __SSE4_2__
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#define RTE_TABLE_HASH_LRU_STRATEGY 2
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#else /* if no SSE, use simple scalar version */
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#define RTE_TABLE_HASH_LRU_STRATEGY 1
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#endif
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#endif
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#if RTE_TABLE_HASH_LRU_STRATEGY == 2
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#if GCC_VERSION > 40306
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#include <x86intrin.h>
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#else
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include <xmmintrin.h>
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#endif
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#define lru_init(bucket) \
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{ bucket->lru_list = 0x0000000100020003LLU; }
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#define lru_pos(bucket) (bucket->lru_list & 0xFFFFLLU)
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#define lru_update(bucket, mru_val) \
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do { \
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/* set up the masks for all possible shuffles, depends on pos */\
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static uint64_t masks[10] = { \
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/* Shuffle order; Make Zero (see _mm_shuffle_epi8 manual) */\
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0x0100070605040302, 0x8080808080808080, \
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0x0302070605040100, 0x8080808080808080, \
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0x0504070603020100, 0x8080808080808080, \
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0x0706050403020100, 0x8080808080808080, \
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0x0706050403020100, 0x8080808080808080}; \
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/* load up one register with repeats of mru-val */ \
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uint64_t mru2 = mru_val; \
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uint64_t mru3 = mru2 | (mru2 << 16); \
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uint64_t lru = bucket->lru_list; \
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/* XOR to cause the word we're looking for to go to zero */ \
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uint64_t mru = lru ^ ((mru3 << 32) | mru3); \
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__m128i c = _mm_cvtsi64_si128(mru); \
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__m128i b = _mm_cvtsi64_si128(lru); \
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/* Find the minimum value (first zero word, if it's in there) */\
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__m128i d = _mm_minpos_epu16(c); \
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/* Second word is the index to found word (first word is the value) */\
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unsigned int pos = _mm_extract_epi16(d, 1); \
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/* move the recently used location to top of list */ \
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__m128i k = _mm_shuffle_epi8(b, *((__m128i *) &masks[2 * pos]));\
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/* Finally, update the original list with the reordered data */ \
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bucket->lru_list = _mm_extract_epi64(k, 0); \
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/* Phwew! */ \
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} while (0)
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#elif RTE_TABLE_HASH_LRU_STRATEGY == 3
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#if GCC_VERSION > 40306
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#include <x86intrin.h>
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#else
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#include <emmintrin.h>
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#include <smmintrin.h>
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#include <xmmintrin.h>
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#endif
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#define lru_init(bucket) \
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{ bucket->lru_list = ~0LLU; }
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static inline int
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f_lru_pos(uint64_t lru_list)
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{
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__m128i lst = _mm_set_epi64x((uint64_t)-1, lru_list);
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__m128i min = _mm_minpos_epu16(lst);
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return _mm_extract_epi16(min, 1);
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}
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#define lru_pos(bucket) f_lru_pos(bucket->lru_list)
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#define lru_update(bucket, mru_val) \
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do { \
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const uint64_t orvals[] = {0xFFFFLLU, 0xFFFFLLU << 16, \
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0xFFFFLLU << 32, 0xFFFFLLU << 48, 0LLU}; \
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const uint64_t decs[] = {0x1000100010001LLU, 0}; \
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__m128i lru = _mm_cvtsi64_si128(bucket->lru_list); \
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__m128i vdec = _mm_cvtsi64_si128(decs[mru_val>>2]); \
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lru = _mm_subs_epu16(lru, vdec); \
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bucket->lru_list = _mm_extract_epi64(lru, 0) | orvals[mru_val]; \
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} while (0)
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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