fib6: add AVX512 lookup
Add new lookup implementation for FIB6 trie algorithm using AVX512 instruction set Signed-off-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
This commit is contained in:
Vladimir Medvedkin
David Marchand
parent
d2ab1e0130
commit
1e5630e40d
@ -327,7 +327,7 @@ New Features
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* **Added AVX512 lookup implementation for FIB.**
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Added a AVX512 lookup functions implementation into FIB library.
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Added a AVX512 lookup functions implementation into FIB and FIB6 libraries.
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* **Added support to update subport bandwidth dynamically.**
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@ -30,6 +30,12 @@ if dpdk_conf.has('RTE_ARCH_X86_64') and binutils_ok.returncode() == 0
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if acl_avx512_on == true
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cflags += ['-DCC_DIR24_8_AVX512_SUPPORT']
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sources += files('dir24_8_avx512.c')
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# TRIE AVX512 implementation uses avx512bw intrinsics along with
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# avx512f and avx512dq
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if cc.get_define('__AVX512BW__', args: machine_args) != ''
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cflags += ['-DCC_TRIE_AVX512_SUPPORT']
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sources += files('trie_avx512.c')
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endif
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elif cc.has_multi_arguments('-mavx512f', '-mavx512dq')
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dir24_8_avx512_tmp = static_library('dir24_8_avx512_tmp',
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'dir24_8_avx512.c',
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@ -37,5 +43,16 @@ if dpdk_conf.has('RTE_ARCH_X86_64') and binutils_ok.returncode() == 0
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c_args: cflags + ['-mavx512f', '-mavx512dq'])
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objs += dir24_8_avx512_tmp.extract_objects('dir24_8_avx512.c')
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cflags += ['-DCC_DIR24_8_AVX512_SUPPORT']
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# TRIE AVX512 implementation uses avx512bw intrinsics along with
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# avx512f and avx512dq
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if cc.has_argument('-mavx512bw')
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trie_avx512_tmp = static_library('trie_avx512_tmp',
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'trie_avx512.c',
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dependencies: static_rte_eal,
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c_args: cflags + ['-mavx512f', \
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'-mavx512dq', '-mavx512bw'])
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objs += trie_avx512_tmp.extract_objects('trie_avx512.c')
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cflags += ['-DCC_TRIE_AVX512_SUPPORT']
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endif
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endif
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endif
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@ -107,7 +107,7 @@ init_dataplane(struct rte_fib6 *fib, __rte_unused int socket_id,
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fib->dp = trie_create(dp_name, socket_id, conf);
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if (fib->dp == NULL)
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return -rte_errno;
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fib->lookup = trie_get_lookup_fn(fib->dp, RTE_FIB6_LOOKUP_TRIE_SCALAR);
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fib->lookup = trie_get_lookup_fn(fib->dp, RTE_FIB6_LOOKUP_DEFAULT);
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fib->modify = trie_modify;
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return 0;
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default:
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@ -61,7 +61,10 @@ enum rte_fib_trie_nh_sz {
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/** Type of lookup function implementation */
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enum rte_fib6_lookup_type {
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RTE_FIB6_LOOKUP_TRIE_SCALAR /**< Scalar lookup function implementation*/
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RTE_FIB6_LOOKUP_DEFAULT,
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/**< Selects the best implementation based on the max simd bitwidth */
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RTE_FIB6_LOOKUP_TRIE_SCALAR, /**< Scalar lookup function implementation*/
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RTE_FIB6_LOOKUP_TRIE_VECTOR_AVX512 /**< Vector implementation using AVX512 */
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};
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/** FIB configuration structure */
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@ -13,11 +13,18 @@
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#include <rte_malloc.h>
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#include <rte_errno.h>
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#include <rte_memory.h>
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#include <rte_vect.h>
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#include <rte_rib6.h>
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#include <rte_fib6.h>
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#include "trie.h"
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#ifdef CC_TRIE_AVX512_SUPPORT
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#include "trie_avx512.h"
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#endif /* CC_TRIE_AVX512_SUPPORT */
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#define TRIE_NAMESIZE 64
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enum edge {
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@ -40,10 +47,34 @@ get_scalar_fn(enum rte_fib_trie_nh_sz nh_sz)
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}
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}
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static inline rte_fib6_lookup_fn_t
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get_vector_fn(enum rte_fib_trie_nh_sz nh_sz)
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{
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#ifdef CC_TRIE_AVX512_SUPPORT
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if ((rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX512F) <= 0) ||
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(rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_512))
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return NULL;
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switch (nh_sz) {
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case RTE_FIB6_TRIE_2B:
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return rte_trie_vec_lookup_bulk_2b;
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case RTE_FIB6_TRIE_4B:
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return rte_trie_vec_lookup_bulk_4b;
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case RTE_FIB6_TRIE_8B:
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return rte_trie_vec_lookup_bulk_8b;
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default:
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return NULL;
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}
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#else
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RTE_SET_USED(nh_sz);
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#endif
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return NULL;
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}
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rte_fib6_lookup_fn_t
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trie_get_lookup_fn(void *p, enum rte_fib6_lookup_type type)
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{
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enum rte_fib_trie_nh_sz nh_sz;
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rte_fib6_lookup_fn_t ret_fn;
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struct rte_trie_tbl *dp = p;
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if (dp == NULL)
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@ -54,6 +85,11 @@ trie_get_lookup_fn(void *p, enum rte_fib6_lookup_type type)
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switch (type) {
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case RTE_FIB6_LOOKUP_TRIE_SCALAR:
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return get_scalar_fn(nh_sz);
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case RTE_FIB6_LOOKUP_TRIE_VECTOR_AVX512:
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return get_vector_fn(nh_sz);
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case RTE_FIB6_LOOKUP_DEFAULT:
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ret_fn = get_vector_fn(nh_sz);
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return (ret_fn != NULL) ? ret_fn : get_scalar_fn(nh_sz);
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default:
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return NULL;
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}
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269
lib/librte_fib/trie_avx512.c
Normal file
269
lib/librte_fib/trie_avx512.c
Normal file
@ -0,0 +1,269 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2020 Intel Corporation
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*/
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#include <rte_vect.h>
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#include <rte_fib6.h>
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#include "trie.h"
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#include "trie_avx512.h"
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static __rte_always_inline void
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transpose_x16(uint8_t ips[16][RTE_FIB6_IPV6_ADDR_SIZE],
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__m512i *first, __m512i *second, __m512i *third, __m512i *fourth)
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{
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__m512i tmp1, tmp2, tmp3, tmp4;
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__m512i tmp5, tmp6, tmp7, tmp8;
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const __rte_x86_zmm_t perm_idxes = {
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.u32 = { 0, 4, 8, 12, 2, 6, 10, 14,
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1, 5, 9, 13, 3, 7, 11, 15
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},
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};
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/* load all ip addresses */
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tmp1 = _mm512_loadu_si512(&ips[0][0]);
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tmp2 = _mm512_loadu_si512(&ips[4][0]);
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tmp3 = _mm512_loadu_si512(&ips[8][0]);
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tmp4 = _mm512_loadu_si512(&ips[12][0]);
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/* transpose 4 byte chunks of 16 ips */
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tmp5 = _mm512_unpacklo_epi32(tmp1, tmp2);
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tmp7 = _mm512_unpackhi_epi32(tmp1, tmp2);
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tmp6 = _mm512_unpacklo_epi32(tmp3, tmp4);
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tmp8 = _mm512_unpackhi_epi32(tmp3, tmp4);
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tmp1 = _mm512_unpacklo_epi32(tmp5, tmp6);
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tmp3 = _mm512_unpackhi_epi32(tmp5, tmp6);
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tmp2 = _mm512_unpacklo_epi32(tmp7, tmp8);
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tmp4 = _mm512_unpackhi_epi32(tmp7, tmp8);
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/* first 4-byte chunks of ips[] */
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*first = _mm512_permutexvar_epi32(perm_idxes.z, tmp1);
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/* second 4-byte chunks of ips[] */
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*second = _mm512_permutexvar_epi32(perm_idxes.z, tmp3);
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/* third 4-byte chunks of ips[] */
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*third = _mm512_permutexvar_epi32(perm_idxes.z, tmp2);
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/* fourth 4-byte chunks of ips[] */
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*fourth = _mm512_permutexvar_epi32(perm_idxes.z, tmp4);
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}
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static __rte_always_inline void
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transpose_x8(uint8_t ips[8][RTE_FIB6_IPV6_ADDR_SIZE],
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__m512i *first, __m512i *second)
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{
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__m512i tmp1, tmp2, tmp3, tmp4;
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const __rte_x86_zmm_t perm_idxes = {
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.u64 = { 0, 2, 4, 6, 1, 3, 5, 7
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},
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};
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tmp1 = _mm512_loadu_si512(&ips[0][0]);
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tmp2 = _mm512_loadu_si512(&ips[4][0]);
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tmp3 = _mm512_unpacklo_epi64(tmp1, tmp2);
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*first = _mm512_permutexvar_epi64(perm_idxes.z, tmp3);
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tmp4 = _mm512_unpackhi_epi64(tmp1, tmp2);
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*second = _mm512_permutexvar_epi64(perm_idxes.z, tmp4);
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}
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static __rte_always_inline void
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trie_vec_lookup_x16(void *p, uint8_t ips[16][RTE_FIB6_IPV6_ADDR_SIZE],
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uint64_t *next_hops, int size)
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{
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struct rte_trie_tbl *dp = (struct rte_trie_tbl *)p;
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const __m512i zero = _mm512_set1_epi32(0);
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const __m512i lsb = _mm512_set1_epi32(1);
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const __m512i two_lsb = _mm512_set1_epi32(3);
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__m512i first, second, third, fourth; /*< IPv6 four byte chunks */
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__m512i idxes, res, shuf_idxes;
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__m512i tmp, tmp2, bytes, byte_chunk, base_idxes;
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/* used to mask gather values if size is 2 (16 bit next hops) */
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const __m512i res_msk = _mm512_set1_epi32(UINT16_MAX);
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const __rte_x86_zmm_t bswap = {
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.u8 = { 2, 1, 0, 255, 6, 5, 4, 255,
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10, 9, 8, 255, 14, 13, 12, 255,
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2, 1, 0, 255, 6, 5, 4, 255,
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10, 9, 8, 255, 14, 13, 12, 255,
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2, 1, 0, 255, 6, 5, 4, 255,
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10, 9, 8, 255, 14, 13, 12, 255,
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2, 1, 0, 255, 6, 5, 4, 255,
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10, 9, 8, 255, 14, 13, 12, 255
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},
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};
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const __mmask64 k = 0x1111111111111111;
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int i = 3;
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__mmask16 msk_ext, new_msk;
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__mmask16 exp_msk = 0x5555;
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transpose_x16(ips, &first, &second, &third, &fourth);
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/* get_tbl24_idx() for every 4 byte chunk */
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idxes = _mm512_shuffle_epi8(first, bswap.z);
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/**
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* lookup in tbl24
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* Put it inside branch to make compiller happy with -O0
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*/
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if (size == sizeof(uint16_t)) {
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res = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 2);
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res = _mm512_and_epi32(res, res_msk);
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} else
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res = _mm512_i32gather_epi32(idxes, (const int *)dp->tbl24, 4);
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/* get extended entries indexes */
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msk_ext = _mm512_test_epi32_mask(res, lsb);
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tmp = _mm512_srli_epi32(res, 1);
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/* idxes to retrieve bytes */
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shuf_idxes = _mm512_setr_epi32(3, 7, 11, 15,
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19, 23, 27, 31,
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35, 39, 43, 47,
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51, 55, 59, 63);
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base_idxes = _mm512_setr_epi32(0, 4, 8, 12,
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16, 20, 24, 28,
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32, 36, 40, 44,
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48, 52, 56, 60);
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/* traverse down the trie */
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while (msk_ext) {
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idxes = _mm512_maskz_slli_epi32(msk_ext, tmp, 8);
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byte_chunk = (i < 8) ?
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((i >= 4) ? second : first) :
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((i >= 12) ? fourth : third);
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bytes = _mm512_maskz_shuffle_epi8(k, byte_chunk, shuf_idxes);
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idxes = _mm512_maskz_add_epi32(msk_ext, idxes, bytes);
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if (size == sizeof(uint16_t)) {
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tmp = _mm512_mask_i32gather_epi32(zero, msk_ext,
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idxes, (const int *)dp->tbl8, 2);
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tmp = _mm512_and_epi32(tmp, res_msk);
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} else
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tmp = _mm512_mask_i32gather_epi32(zero, msk_ext,
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idxes, (const int *)dp->tbl8, 4);
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new_msk = _mm512_test_epi32_mask(tmp, lsb);
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res = _mm512_mask_blend_epi32(msk_ext ^ new_msk, res, tmp);
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tmp = _mm512_srli_epi32(tmp, 1);
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msk_ext = new_msk;
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shuf_idxes = _mm512_maskz_add_epi8(k, shuf_idxes, lsb);
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shuf_idxes = _mm512_and_epi32(shuf_idxes, two_lsb);
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shuf_idxes = _mm512_maskz_add_epi8(k, shuf_idxes, base_idxes);
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i++;
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}
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res = _mm512_srli_epi32(res, 1);
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tmp = _mm512_maskz_expand_epi32(exp_msk, res);
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__m256i tmp256;
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tmp256 = _mm512_extracti32x8_epi32(res, 1);
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tmp2 = _mm512_maskz_expand_epi32(exp_msk,
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_mm512_castsi256_si512(tmp256));
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_mm512_storeu_si512(next_hops, tmp);
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_mm512_storeu_si512(next_hops + 8, tmp2);
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}
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static void
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trie_vec_lookup_x8_8b(void *p, uint8_t ips[8][RTE_FIB6_IPV6_ADDR_SIZE],
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uint64_t *next_hops)
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{
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struct rte_trie_tbl *dp = (struct rte_trie_tbl *)p;
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const __m512i zero = _mm512_set1_epi32(0);
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const __m512i lsb = _mm512_set1_epi32(1);
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const __m512i three_lsb = _mm512_set1_epi32(7);
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__m512i first, second; /*< IPv6 eight byte chunks */
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__m512i idxes, res, shuf_idxes;
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__m512i tmp, bytes, byte_chunk, base_idxes;
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const __rte_x86_zmm_t bswap = {
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.u8 = { 2, 1, 0, 255, 255, 255, 255, 255,
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10, 9, 8, 255, 255, 255, 255, 255,
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2, 1, 0, 255, 255, 255, 255, 255,
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10, 9, 8, 255, 255, 255, 255, 255,
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2, 1, 0, 255, 255, 255, 255, 255,
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10, 9, 8, 255, 255, 255, 255, 255,
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2, 1, 0, 255, 255, 255, 255, 255,
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10, 9, 8, 255, 255, 255, 255, 255
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},
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};
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const __mmask64 k = 0x101010101010101;
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int i = 3;
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__mmask8 msk_ext, new_msk;
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transpose_x8(ips, &first, &second);
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/* get_tbl24_idx() for every 4 byte chunk */
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idxes = _mm512_shuffle_epi8(first, bswap.z);
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/* lookup in tbl24 */
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res = _mm512_i64gather_epi64(idxes, (const void *)dp->tbl24, 8);
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/* get extended entries indexes */
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msk_ext = _mm512_test_epi64_mask(res, lsb);
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tmp = _mm512_srli_epi64(res, 1);
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/* idxes to retrieve bytes */
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shuf_idxes = _mm512_setr_epi64(3, 11, 19, 27, 35, 43, 51, 59);
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base_idxes = _mm512_setr_epi64(0, 8, 16, 24, 32, 40, 48, 56);
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/* traverse down the trie */
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while (msk_ext) {
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idxes = _mm512_maskz_slli_epi64(msk_ext, tmp, 8);
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byte_chunk = (i < 8) ? first : second;
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bytes = _mm512_maskz_shuffle_epi8(k, byte_chunk, shuf_idxes);
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idxes = _mm512_maskz_add_epi64(msk_ext, idxes, bytes);
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tmp = _mm512_mask_i64gather_epi64(zero, msk_ext,
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idxes, (const void *)dp->tbl8, 8);
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new_msk = _mm512_test_epi64_mask(tmp, lsb);
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res = _mm512_mask_blend_epi64(msk_ext ^ new_msk, res, tmp);
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tmp = _mm512_srli_epi64(tmp, 1);
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msk_ext = new_msk;
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shuf_idxes = _mm512_maskz_add_epi8(k, shuf_idxes, lsb);
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shuf_idxes = _mm512_and_epi64(shuf_idxes, three_lsb);
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shuf_idxes = _mm512_maskz_add_epi8(k, shuf_idxes, base_idxes);
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i++;
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}
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res = _mm512_srli_epi64(res, 1);
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_mm512_storeu_si512(next_hops, res);
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}
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void
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rte_trie_vec_lookup_bulk_2b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
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uint64_t *next_hops, const unsigned int n)
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{
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uint32_t i;
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for (i = 0; i < (n / 16); i++) {
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trie_vec_lookup_x16(p, (uint8_t (*)[16])&ips[i * 16][0],
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next_hops + i * 16, sizeof(uint16_t));
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}
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rte_trie_lookup_bulk_2b(p, (uint8_t (*)[16])&ips[i * 16][0],
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next_hops + i * 16, n - i * 16);
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}
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void
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rte_trie_vec_lookup_bulk_4b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
|
||||
uint64_t *next_hops, const unsigned int n)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < (n / 16); i++) {
|
||||
trie_vec_lookup_x16(p, (uint8_t (*)[16])&ips[i * 16][0],
|
||||
next_hops + i * 16, sizeof(uint32_t));
|
||||
}
|
||||
rte_trie_lookup_bulk_4b(p, (uint8_t (*)[16])&ips[i * 16][0],
|
||||
next_hops + i * 16, n - i * 16);
|
||||
}
|
||||
|
||||
void
|
||||
rte_trie_vec_lookup_bulk_8b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
|
||||
uint64_t *next_hops, const unsigned int n)
|
||||
{
|
||||
uint32_t i;
|
||||
for (i = 0; i < (n / 8); i++) {
|
||||
trie_vec_lookup_x8_8b(p, (uint8_t (*)[16])&ips[i * 8][0],
|
||||
next_hops + i * 8);
|
||||
}
|
||||
rte_trie_lookup_bulk_8b(p, (uint8_t (*)[16])&ips[i * 8][0],
|
||||
next_hops + i * 8, n - i * 8);
|
||||
}
|
||||
20
lib/librte_fib/trie_avx512.h
Normal file
20
lib/librte_fib/trie_avx512.h
Normal file
@ -0,0 +1,20 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause
|
||||
* Copyright(c) 2020 Intel Corporation
|
||||
*/
|
||||
|
||||
#ifndef _TRIE_AVX512_H_
|
||||
#define _TRIE_AVX512_H_
|
||||
|
||||
void
|
||||
rte_trie_vec_lookup_bulk_2b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
|
||||
uint64_t *next_hops, const unsigned int n);
|
||||
|
||||
void
|
||||
rte_trie_vec_lookup_bulk_4b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
|
||||
uint64_t *next_hops, const unsigned int n);
|
||||
|
||||
void
|
||||
rte_trie_vec_lookup_bulk_8b(void *p, uint8_t ips[][RTE_FIB6_IPV6_ADDR_SIZE],
|
||||
uint64_t *next_hops, const unsigned int n);
|
||||
|
||||
#endif /* _TRIE_AVX512_H_ */
|
||||
Loading…
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Reference in New Issue
Block a user