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net/octeontx2: setup link config based on BP level

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Configure NIX_AF_TL3_TL2X_LINKX_CFG using schq at
level based on NIX_AF_PSE_CHANNEL_LEVEL[BP_LEVEL].

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
This commit is contained in:
Nithin Dabilpuram 2020-04-03 14:22:06 +05:30 committed by Ferruh Yigit
parent c07fbbace8
commit 1e8d75d805
2 changed files with 16 additions and 1 deletions
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1
drivers/net/octeontx2/otx2_ethdev.h
View File

@ -304,6 +304,7 @@ struct otx2_eth_dev {
/* Contiguous queues */
uint16_t txschq_contig_list[NIX_TXSCH_LVL_CNT][MAX_TXSCHQ_PER_FUNC];
uint16_t otx2_tm_root_lvl;
uint16_t link_cfg_lvl;
uint16_t tm_flags;
uint16_t tm_leaf_cnt;
struct otx2_nix_tm_node_list node_list;

16
drivers/net/octeontx2/otx2_tm.c
View File

@ -437,6 +437,16 @@ populate_tm_registers(struct otx2_eth_dev *dev,
*reg++ = NIX_AF_TL3X_SCHEDULE(schq);
*regval++ = (strict_schedul_prio << 24) | rr_quantum;
req->num_regs++;
/* Link configuration */
if (!otx2_dev_is_sdp(dev) &&
dev->link_cfg_lvl == NIX_TXSCH_LVL_TL3) {
*reg++ = NIX_AF_TL3_TL2X_LINKX_CFG(schq,
nix_get_link(dev));
*regval++ = BIT_ULL(12) | nix_get_relchan(dev);
req->num_regs++;
}
if (pir.rate && pir.burst) {
*reg++ = NIX_AF_TL3X_PIR(schq);
*regval++ = shaper2regval(&pir) | 1;
@ -471,7 +481,10 @@ populate_tm_registers(struct otx2_eth_dev *dev,
else
*regval++ = (strict_schedul_prio << 24) | rr_quantum;
req->num_regs++;
if (!otx2_dev_is_sdp(dev)) {
/* Link configuration */
if (!otx2_dev_is_sdp(dev) &&
dev->link_cfg_lvl == NIX_TXSCH_LVL_TL2) {
*reg++ = NIX_AF_TL3_TL2X_LINKX_CFG(schq,
nix_get_link(dev));
*regval++ = BIT_ULL(12) | nix_get_relchan(dev);
@ -1144,6 +1157,7 @@ nix_tm_send_txsch_alloc_msg(struct otx2_eth_dev *dev)
return rc;
nix_tm_copy_rsp_to_dev(dev, rsp);
dev->link_cfg_lvl = rsp->link_cfg_lvl;
nix_tm_assign_hw_id(dev);
return 0;