i40e: move Tx offloads parameters to separate structure
The structure size is u64 so it could be used with single cpu operation. Test report: http://www.dpdk.org/ml/archives/dev/2015-March/014467.html Signed-off-by: Jijiang Liu <jijiang.liu@intel.com> Signed-off-by: Miroslaw Walukiewicz <miroslaw.walukiewicz@intel.com> Signed-off-by: Grzegorz Galkowski <grzegorz.galkowski@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Acked-by: Helin Zhang <helin.zhang@intel.com> Tested-by: Min Cao <min.cao@intel.com>
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@ -465,16 +465,13 @@ static inline void
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i40e_txd_enable_checksum(uint64_t ol_flags,
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uint32_t *td_cmd,
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uint32_t *td_offset,
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uint8_t l2_len,
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uint16_t l3_len,
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uint8_t outer_l2_len,
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uint16_t outer_l3_len,
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union i40e_tx_offload tx_offload,
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uint32_t *cd_tunneling)
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{
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/* UDP tunneling packet TX checksum offload */
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if (ol_flags & PKT_TX_OUTER_IP_CKSUM) {
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*td_offset |= (outer_l2_len >> 1)
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*td_offset |= (tx_offload.outer_l2_len >> 1)
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<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;
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if (ol_flags & PKT_TX_OUTER_IP_CKSUM)
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@ -485,25 +482,28 @@ i40e_txd_enable_checksum(uint64_t ol_flags,
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*cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;
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/* Now set the ctx descriptor fields */
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*cd_tunneling |= (outer_l3_len >> 2) <<
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*cd_tunneling |= (tx_offload.outer_l3_len >> 2) <<
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I40E_TXD_CTX_QW0_EXT_IPLEN_SHIFT |
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(l2_len >> 1) <<
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(tx_offload.l2_len >> 1) <<
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I40E_TXD_CTX_QW0_NATLEN_SHIFT;
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} else
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*td_offset |= (l2_len >> 1)
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*td_offset |= (tx_offload.l2_len >> 1)
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<< I40E_TX_DESC_LENGTH_MACLEN_SHIFT;
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/* Enable L3 checksum offloads */
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if (ol_flags & PKT_TX_IP_CKSUM) {
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*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4_CSUM;
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*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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*td_offset |= (tx_offload.l3_len >> 2)
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<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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} else if (ol_flags & PKT_TX_IPV4) {
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*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV4;
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*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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*td_offset |= (tx_offload.l3_len >> 2)
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<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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} else if (ol_flags & PKT_TX_IPV6) {
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*td_cmd |= I40E_TX_DESC_CMD_IIPT_IPV6;
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*td_offset |= (l3_len >> 2) << I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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*td_offset |= (tx_offload.l3_len >> 2)
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<< I40E_TX_DESC_LENGTH_IPLEN_SHIFT;
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}
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/* Enable L4 checksum offloads */
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@ -1183,15 +1183,12 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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uint32_t tx_flags;
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uint32_t td_tag;
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uint64_t ol_flags;
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uint8_t l2_len;
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uint16_t l3_len;
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uint8_t outer_l2_len;
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uint16_t outer_l3_len;
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uint16_t nb_used;
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uint16_t nb_ctx;
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uint16_t tx_last;
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uint16_t slen;
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uint64_t buf_dma_addr;
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union i40e_tx_offload tx_offload = { .data = 0 };
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txq = tx_queue;
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sw_ring = txq->sw_ring;
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@ -1213,10 +1210,10 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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RTE_MBUF_PREFETCH_TO_FREE(txe->mbuf);
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ol_flags = tx_pkt->ol_flags;
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l2_len = tx_pkt->l2_len;
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l3_len = tx_pkt->l3_len;
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outer_l2_len = tx_pkt->outer_l2_len;
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outer_l3_len = tx_pkt->outer_l3_len;
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tx_offload.l2_len = tx_pkt->l2_len;
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tx_offload.l3_len = tx_pkt->l3_len;
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tx_offload.outer_l2_len = tx_pkt->outer_l2_len;
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tx_offload.outer_l3_len = tx_pkt->outer_l3_len;
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/* Calculate the number of context descriptors needed. */
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nb_ctx = i40e_calc_context_desc(ol_flags);
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@ -1267,9 +1264,7 @@ i40e_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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cd_tunneling_params = 0;
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if (unlikely(ol_flags & I40E_TX_CKSUM_OFFLOAD_MASK)) {
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i40e_txd_enable_checksum(ol_flags, &td_cmd, &td_offset,
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l2_len, l3_len, outer_l2_len,
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outer_l3_len,
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&cd_tunneling_params);
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tx_offload, &cd_tunneling_params);
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}
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if (unlikely(nb_ctx)) {
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@ -154,6 +154,17 @@ struct i40e_tx_queue {
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bool tx_deferred_start; /**< don't start this queue in dev start */
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};
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/** Offload features */
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union i40e_tx_offload {
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uint64_t data;
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struct {
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uint64_t l2_len:7; /**< L2 (MAC) Header Length. */
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uint64_t l3_len:9; /**< L3 (IP) Header Length. */
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uint64_t outer_l2_len:8; /**< outer L2 Header Length */
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uint64_t outer_l3_len:16; /**< outer L3 Header Length */
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};
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};
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int i40e_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);
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int i40e_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);
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int i40e_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);
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