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common/mlx5: update PRM definitions for regex

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Update PRM hca capabilities definitions as follows:
regexp_version field added - specifies whether BF2 or BF3
regexp field removed
regexp_params field moved
regexp_log_crspace_size field removed
regexp_mmo added - specifies if using regex mmo wqe is supported

Allow regex only if both regexp_params and regexp_mmo are set,
instead of checking regexp_mmo only.

Check version through the new capability field regexp_version instead
of reading crspace register.

Signed-off-by: Ady Agbarih <adypodoman@gmail.com>
Acked-by: Ori Kam <orika@nvidia.com>
This commit is contained in:
Ady Agbarih 2021-10-22 15:45:51 +00:00 committed by Thomas Monjalon
parent 5b08ac4e4a
commit 2044860ebd
5 changed files with 12 additions and 20 deletions
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3
drivers/common/mlx5/mlx5_devx_cmds.c
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@ -821,7 +821,8 @@ mlx5_devx_cmd_query_hca_attr(void *ctx,
attr->sq_ts_format = MLX5_GET(cmd_hca_cap, hcattr, sq_ts_format);
attr->steering_format_version =
MLX5_GET(cmd_hca_cap, hcattr, steering_format_version);
attr->regex = MLX5_GET(cmd_hca_cap, hcattr, regexp);
attr->regexp_params = MLX5_GET(cmd_hca_cap, hcattr, regexp_params);
attr->regexp_version = MLX5_GET(cmd_hca_cap, hcattr, regexp_version);
attr->regexp_num_of_engines = MLX5_GET(cmd_hca_cap, hcattr,
regexp_num_of_engines);
/* Read the general_obj_types bitmap and extract the relevant bits. */

3
drivers/common/mlx5/mlx5_devx_cmds.h
View File

@ -143,7 +143,8 @@ struct mlx5_hca_attr {
uint32_t sq_ts_format:2;
uint32_t steering_format_version:4;
uint32_t qp_ts_format:2;
uint32_t regex:1;
uint32_t regexp_params:1;
uint32_t regexp_version:3;
uint32_t reg_c_preserve:1;
uint32_t ct_offload:1; /* General obj type ASO CT offload supported. */
uint32_t crypto:1; /* Crypto engine is supported. */

12
drivers/common/mlx5/mlx5_prm.h
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@ -1341,16 +1341,13 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 wqe_index_ignore_cap[0x1];
u8 dynamic_qp_allocation[0x1];
u8 log_max_qp[0x5];
u8 regexp[0x1];
u8 reserved_at_a1[0x3];
u8 reserved_at_a0[0x4];
u8 regexp_num_of_engines[0x4];
u8 reserved_at_a8[0x1];
u8 reg_c_preserve[0x1];
u8 reserved_at_aa[0x1];
u8 log_max_srq[0x5];
u8 reserved_at_b0[0x3];
u8 regexp_log_crspace_size[0x5];
u8 reserved_at_b8[0x3];
u8 reserved_at_b0[0xb];
u8 scatter_fcs_w_decap_disable[0x1];
u8 reserved_at_bc[0x4];
u8 reserved_at_c0[0x8];
@ -1506,7 +1503,8 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 uc[0x1];
u8 rc[0x1];
u8 uar_4k[0x1];
u8 reserved_at_241[0x9];
u8 reserved_at_241[0x8];
u8 regexp_params[0x1];
u8 uar_sz[0x6];
u8 port_selection_cap[0x1];
u8 reserved_at_251[0x7];
@ -1523,7 +1521,7 @@ struct mlx5_ifc_cmd_hca_cap_bits {
u8 max_wqe_sz_sq[0x10];
u8 reserved_at_2a0[0xc];
u8 regexp_mmo_sq[0x1];
u8 reserved_at_2b0[0x3];
u8 regexp_version[0x3];
u8 max_wqe_sz_rq[0x10];
u8 max_flow_counter_31_16[0x10];
u8 max_wqe_sz_sq_dc[0x10];

12
drivers/regex/mlx5/mlx5_regex.c
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@ -90,10 +90,8 @@ mlx5_regex_dev_probe(struct mlx5_common_device *cdev)
struct mlx5_regex_priv *priv = NULL;
struct mlx5_hca_attr *attr = &cdev->config.hca_attr;
char name[RTE_REGEXDEV_NAME_MAX_LEN];
int ret;
uint32_t val;
if ((!attr->regex && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en)
if ((!attr->regexp_params && !attr->mmo_regex_sq_en && !attr->mmo_regex_qp_en)
|| attr->regexp_num_of_engines == 0) {
DRV_LOG(ERR, "Not enough capabilities to support RegEx, maybe "
"old FW/OFED version?");
@ -116,13 +114,7 @@ mlx5_regex_dev_probe(struct mlx5_common_device *cdev)
priv->mmo_regex_sq_cap = attr->mmo_regex_sq_en;
priv->cdev = cdev;
priv->nb_engines = 2; /* attr.regexp_num_of_engines */
ret = mlx5_devx_regex_register_read(priv->cdev->ctx, 0,
MLX5_RXP_CSR_IDENTIFIER, &val);
if (ret) {
DRV_LOG(ERR, "CSR read failed!");
goto dev_error;
}
if (val == MLX5_RXP_BF2_IDENTIFIER)
if (attr->regexp_version == MLX5_RXP_BF2_IDENTIFIER)
priv->is_bf2 = 1;
/* Default RXP programming mode to Shared. */
priv->prog_mode = MLX5_RXP_SHARED_PROG_MODE;

2
drivers/regex/mlx5/mlx5_rxp_csrs.h
View File

@ -6,7 +6,7 @@
#define _MLX5_RXP_CSRS_H_
/* BF types */
#define MLX5_RXP_BF2_IDENTIFIER 0x07055254ul
#define MLX5_RXP_BF2_IDENTIFIER 0x0
/*
* Common to all RXP implementations