d/numam-dpdk
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

bus/pci: configure PCI bus master

Browse Source 
Add the API to set 'Bus Master Enable' bit to be enabled or disabled in
the PCI command register.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
This commit is contained in:
Haiyue Wang 2021-05-24 09:23:43 +08:00 committed by David Marchand
parent 64307fad7d
commit 21f6adec07
4 changed files with 49 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

28
drivers/bus/pci/pci_common.c
View File

@ -746,6 +746,34 @@ rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap)
return 0;
}
int
rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable)
{
uint16_t old_cmd, cmd;
if (rte_pci_read_config(dev, &old_cmd, sizeof(old_cmd),
RTE_PCI_COMMAND) < 0) {
RTE_LOG(ERR, EAL, "error in reading PCI command register\n");
return -1;
}
if (enable)
cmd = old_cmd | RTE_PCI_COMMAND_MASTER;
else
cmd = old_cmd & ~RTE_PCI_COMMAND_MASTER;
if (cmd == old_cmd)
return 0;
if (rte_pci_write_config(dev, &cmd, sizeof(cmd),
RTE_PCI_COMMAND) < 0) {
RTE_LOG(ERR, EAL, "error in writing PCI command register\n");
return -1;
}
return 0;
}
struct rte_pci_bus rte_pci_bus = {
.bus = {
.scan = rte_pci_scan,

14
drivers/bus/pci/rte_bus_pci.h
View File

@ -249,6 +249,20 @@ void rte_pci_dump(FILE *f);
__rte_experimental
off_t rte_pci_find_ext_capability(struct rte_pci_device *dev, uint32_t cap);
/**
* Enables/Disables Bus Master for device's PCI command register.
*
* @param dev
* A pointer to rte_pci_device structure.
* @param enable
* Enable or disable Bus Master.
*
* @return
* 0 on success, -1 on error in PCI config space read/write.
*/
__rte_experimental
int rte_pci_set_bus_master(struct rte_pci_device *dev, bool enable);
/**
* Register a PCI driver.
*

3
drivers/bus/pci/version.map
View File

@ -21,4 +21,7 @@ EXPERIMENTAL {
global:
rte_pci_find_ext_capability;
# added in 21.08
rte_pci_set_bus_master;
};

4
lib/pci/rte_pci.h
View File

@ -32,6 +32,10 @@ extern "C" {
#define RTE_PCI_VENDOR_ID 0x00 /* 16 bits */
#define RTE_PCI_DEVICE_ID 0x02 /* 16 bits */
#define RTE_PCI_COMMAND 0x04 /* 16 bits */
/* PCI Command Register */
#define RTE_PCI_COMMAND_MASTER 0x4 /* Bus Master Enable */
/* PCI Express capability registers */
#define RTE_PCI_EXP_DEVCTL 8 /* Device Control */