net/ixgbe: move PCI device IDs from EAL
PCI device ids moved from common header into ixgbe driver itself. KNI starts using pci_device_id from kni/ethtool/ixgbe driver, this is only for KNI ethtool support, KNI data path is not affected. Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
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562ad630f4
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221fba3b98
@ -429,23 +429,80 @@ static int ixgbe_dev_udp_tunnel_port_del(struct rte_eth_dev *dev,
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* The set of PCI devices this driver supports
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*/
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static const struct rte_pci_id pci_id_ixgbe_map[] = {
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#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#include "rte_pci_dev_ids.h"
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{ .vendor_id = 0, /* sentinel */ },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_BX) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_DUAL_PORT) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AF_SINGLE_PORT) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598AT2) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_SFP_LOM) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_CX4) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_CX4_DUAL_PORT) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_DA_DUAL_PORT) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82598EB_XF_LR) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KX4_MEZZ) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_KR) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_COMBO_BACKPLANE) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_CX4) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_SFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_RNDC) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_560FLR) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_SUBDEV_ID_82599_ECNA_DP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BACKPLANE_FCOE) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_FCOE) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_EM) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF2) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_SFP_SF_QP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_QSFP_SF_QP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599EN_SFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_XAUI_LOM) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_T3_LOM) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_LS) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_SFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_10G_T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_1G_T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_KR_L) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP_N) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SGMII_L) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_10G_T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_QSFP_N) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_SFP) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_1G_T_L) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KX4) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_KR) },
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#ifdef RTE_NIC_BYPASS
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_BYPASS) },
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#endif
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{ .vendor_id = 0, /* sentinel */ },
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};
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/*
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* The set of PCI devices this driver supports (for 82599 VF)
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*/
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static const struct rte_pci_id pci_id_ixgbevf_map[] = {
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#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#include "rte_pci_dev_ids.h"
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{ .vendor_id = 0, /* sentinel */ },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_VF) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_82599_VF_HV) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_VF) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540_VF_HV) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550_VF_HV) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550_VF) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_VF) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_A_VF_HV) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_VF) },
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{ RTE_PCI_DEVICE(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550EM_X_VF_HV) },
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{ .vendor_id = 0, /* sentinel */ },
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};
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static const struct rte_eth_desc_lim rx_desc_lim = {
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@ -65,14 +65,6 @@
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#define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev)
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#endif
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#ifndef RTE_PCI_DEV_ID_DECL_IXGBE
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#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev)
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#endif
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#ifndef RTE_PCI_DEV_ID_DECL_IXGBEVF
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#define RTE_PCI_DEV_ID_DECL_IXGBEVF(vend, dev)
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#endif
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#ifndef PCI_VENDOR_ID_INTEL
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/** Vendor ID used by Intel devices */
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#define PCI_VENDOR_ID_INTEL 0x8086
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@ -159,128 +151,6 @@ RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SERDES)
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RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE)
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RTE_PCI_DEV_ID_DECL_IGB(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_DH89XXCC_SFP)
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/****************** Physical IXGBE devices from ixgbe_type.h ******************/
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#define IXGBE_DEV_ID_82598 0x10B6
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#define IXGBE_DEV_ID_82598_BX 0x1508
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#define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
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#define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
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#define IXGBE_DEV_ID_82598AT 0x10C8
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#define IXGBE_DEV_ID_82598AT2 0x150B
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#define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
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#define IXGBE_DEV_ID_82598EB_CX4 0x10DD
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#define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
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#define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
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#define IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM 0x10E1
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#define IXGBE_DEV_ID_82598EB_XF_LR 0x10F4
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#define IXGBE_DEV_ID_82599_KX4 0x10F7
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#define IXGBE_DEV_ID_82599_KX4_MEZZ 0x1514
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#define IXGBE_DEV_ID_82599_KR 0x1517
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#define IXGBE_DEV_ID_82599_COMBO_BACKPLANE 0x10F8
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#define IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ 0x000C
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#define IXGBE_DEV_ID_82599_CX4 0x10F9
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#define IXGBE_DEV_ID_82599_SFP 0x10FB
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#define IXGBE_SUBDEV_ID_82599_SFP 0x11A9
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#define IXGBE_SUBDEV_ID_82599_RNDC 0x1F72
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#define IXGBE_SUBDEV_ID_82599_560FLR 0x17D0
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#define IXGBE_SUBDEV_ID_82599_ECNA_DP 0x0470
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#define IXGBE_DEV_ID_82599_BACKPLANE_FCOE 0x152A
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#define IXGBE_DEV_ID_82599_SFP_FCOE 0x1529
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#define IXGBE_DEV_ID_82599_SFP_EM 0x1507
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#define IXGBE_DEV_ID_82599_SFP_SF2 0x154D
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#define IXGBE_DEV_ID_82599_SFP_SF_QP 0x154A
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#define IXGBE_DEV_ID_82599_QSFP_SF_QP 0x1558
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#define IXGBE_DEV_ID_82599EN_SFP 0x1557
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#define IXGBE_DEV_ID_82599_XAUI_LOM 0x10FC
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#define IXGBE_DEV_ID_82599_T3_LOM 0x151C
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#define IXGBE_DEV_ID_82599_LS 0x154F
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#define IXGBE_DEV_ID_X540T 0x1528
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#define IXGBE_DEV_ID_X540T1 0x1560
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#define IXGBE_DEV_ID_X550EM_X_SFP 0x15AC
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#define IXGBE_DEV_ID_X550EM_X_10G_T 0x15AD
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#define IXGBE_DEV_ID_X550EM_X_1G_T 0x15AE
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#define IXGBE_DEV_ID_X550T 0x1563
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#define IXGBE_DEV_ID_X550T1 0x15D1
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#define IXGBE_DEV_ID_X550EM_A_KR 0x15C2
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#define IXGBE_DEV_ID_X550EM_A_KR_L 0x15C3
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#define IXGBE_DEV_ID_X550EM_A_SFP_N 0x15C4
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#define IXGBE_DEV_ID_X550EM_A_SGMII 0x15C6
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#define IXGBE_DEV_ID_X550EM_A_SGMII_L 0x15C7
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#define IXGBE_DEV_ID_X550EM_A_10G_T 0x15C8
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#define IXGBE_DEV_ID_X550EM_A_QSFP 0x15CA
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#define IXGBE_DEV_ID_X550EM_A_QSFP_N 0x15CC
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#define IXGBE_DEV_ID_X550EM_A_SFP 0x15CE
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#define IXGBE_DEV_ID_X550EM_A_1G_T 0x15E4
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#define IXGBE_DEV_ID_X550EM_A_1G_T_L 0x15E5
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#define IXGBE_DEV_ID_X550EM_X_KX4 0x15AA
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#define IXGBE_DEV_ID_X550EM_X_KR 0x15AB
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#ifdef RTE_NIC_BYPASS
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#define IXGBE_DEV_ID_82599_BYPASS 0x155D
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#endif
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_BX)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
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IXGBE_DEV_ID_82598AF_SINGLE_PORT)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598AT2)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_CX4)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
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IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82598EB_XF_LR)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_KR)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
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IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, \
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IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_CX4)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_SFP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_RNDC)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_560FLR)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_SUBDEV_ID_82599_ECNA_DP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_EM)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF2)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_SFP_SF_QP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599EN_SFP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_T3_LOM)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_LS)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540T1)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_SFP)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_10G_T)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_1G_T)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550T1)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_KR)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_KR_L)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SFP_N)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SGMII)
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RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SGMII_L)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_10G_T)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_QSFP)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_QSFP_N)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_SFP)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_1G_T)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_1G_T_L)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KX4)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_KR)
|
||||
|
||||
#ifdef RTE_NIC_BYPASS
|
||||
RTE_PCI_DEV_ID_DECL_IXGBE(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_BYPASS)
|
||||
#endif
|
||||
|
||||
/****************** Virtual IGB devices from e1000_hw.h ******************/
|
||||
|
||||
#define E1000_DEV_ID_82576_VF 0x10CA
|
||||
@ -293,34 +163,8 @@ RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_82576_VF_HV)
|
||||
RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IGBVF(PCI_VENDOR_ID_INTEL, E1000_DEV_ID_I350_VF_HV)
|
||||
|
||||
/****************** Virtual IXGBE devices from ixgbe_type.h ******************/
|
||||
|
||||
#define IXGBE_DEV_ID_82599_VF 0x10ED
|
||||
#define IXGBE_DEV_ID_82599_VF_HV 0x152E
|
||||
#define IXGBE_DEV_ID_X540_VF 0x1515
|
||||
#define IXGBE_DEV_ID_X540_VF_HV 0x1530
|
||||
#define IXGBE_DEV_ID_X550_VF_HV 0x1564
|
||||
#define IXGBE_DEV_ID_X550_VF 0x1565
|
||||
#define IXGBE_DEV_ID_X550EM_A_VF 0x15C5
|
||||
#define IXGBE_DEV_ID_X550EM_A_VF_HV 0x15B4
|
||||
#define IXGBE_DEV_ID_X550EM_X_VF 0x15A8
|
||||
#define IXGBE_DEV_ID_X550EM_X_VF_HV 0x15A9
|
||||
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_82599_VF_HV)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X540_VF_HV)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF_HV)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_A_VF_HV)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF)
|
||||
RTE_PCI_DEV_ID_DECL_IXGBEVF(PCI_VENDOR_ID_INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV)
|
||||
|
||||
/*
|
||||
* Undef all RTE_PCI_DEV_ID_DECL_* here.
|
||||
*/
|
||||
#undef RTE_PCI_DEV_ID_DECL_IGB
|
||||
#undef RTE_PCI_DEV_ID_DECL_IGBVF
|
||||
#undef RTE_PCI_DEV_ID_DECL_IXGBE
|
||||
#undef RTE_PCI_DEV_ID_DECL_IXGBEVF
|
||||
|
@ -55,6 +55,7 @@ extern void kni_set_ethtool_ops(struct net_device *netdev);
|
||||
|
||||
extern int ixgbe_kni_probe(struct pci_dev *pdev, struct net_device **lad_dev);
|
||||
extern void ixgbe_kni_remove(struct pci_dev *pdev);
|
||||
extern struct pci_device_id ixgbe_pci_tbl[];
|
||||
extern int igb_kni_probe(struct pci_dev *pdev, struct net_device **lad_dev);
|
||||
extern void igb_kni_remove(struct pci_dev *pdev);
|
||||
|
||||
@ -353,15 +354,14 @@ kni_dev_remove(struct kni_dev *dev)
|
||||
if (!dev)
|
||||
return -ENODEV;
|
||||
|
||||
if (pci_match_id(ixgbe_pci_tbl, dev->pci_dev))
|
||||
ixgbe_kni_remove(dev->pci_dev);
|
||||
|
||||
switch (dev->device_id) {
|
||||
#define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
|
||||
#include <rte_pci_dev_ids.h>
|
||||
igb_kni_remove(dev->pci_dev);
|
||||
break;
|
||||
#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) case (dev):
|
||||
#include <rte_pci_dev_ids.h>
|
||||
ixgbe_kni_remove(dev->pci_dev);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
@ -510,16 +510,15 @@ kni_ioctl_create(struct net *net,
|
||||
(PCI_SLOT(pci->devfn) == dev_info.devid) &&
|
||||
(PCI_FUNC(pci->devfn) == dev_info.function)) {
|
||||
found_pci = pci;
|
||||
|
||||
if (pci_match_id(ixgbe_pci_tbl, found_pci))
|
||||
ret = ixgbe_kni_probe(found_pci, &lad_dev);
|
||||
|
||||
switch (dev_info.device_id) {
|
||||
#define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) case (dev):
|
||||
#include <rte_pci_dev_ids.h>
|
||||
ret = igb_kni_probe(found_pci, &lad_dev);
|
||||
break;
|
||||
#define RTE_PCI_DEV_ID_DECL_IXGBE(vend, dev) \
|
||||
case (dev):
|
||||
#include <rte_pci_dev_ids.h>
|
||||
ret = ixgbe_kni_probe(found_pci, &lad_dev);
|
||||
break;
|
||||
default:
|
||||
ret = -1;
|
||||
break;
|
||||
|
Loading…
Reference in New Issue
Block a user