ixgbe/base: add flow director drop queue
This patch adds ixgbe_set_fdir_drop_queue_82599 for enabling and setting flow director drop queue, and adds sets drop no match in ixgbe_init_fdir_perfect_82599 for x550. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
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9243820b25
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@ -1369,7 +1369,7 @@ s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
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* Continue setup of fdirctrl register bits:
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* Turn perfect match filtering on
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* Report hash in RSS field of Rx wb descriptor
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* Initialize the drop queue
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* Initialize the drop queue to queue 127
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* Move the flexible bytes to use the ethertype - shift 6 words
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* Set the maximum length per hash bucket to 0xA filters
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* Send interrupt when 64 (0x4 * 16) filters are left
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@ -1380,6 +1380,9 @@ s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
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(0x6 << IXGBE_FDIRCTRL_FLEX_SHIFT) |
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(0xA << IXGBE_FDIRCTRL_MAX_LENGTH_SHIFT) |
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(4 << IXGBE_FDIRCTRL_FULL_THRESH_SHIFT);
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if ((hw->mac.type == ixgbe_mac_X550) ||
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(hw->mac.type == ixgbe_mac_X550EM_x))
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fdirctrl |= IXGBE_FDIRCTRL_DROP_NO_MATCH;
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if (cloud_mode)
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fdirctrl |=(IXGBE_FDIRCTRL_FILTERMODE_CLOUD <<
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@ -1391,6 +1394,39 @@ s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
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return IXGBE_SUCCESS;
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}
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/**
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* ixgbe_set_fdir_drop_queue_82599 - Set Flow Director drop queue
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* @hw: pointer to hardware structure
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* @dropqueue: Rx queue index used for the dropped packets
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**/
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void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue)
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{
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u32 fdirctrl;
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DEBUGFUNC("ixgbe_set_fdir_drop_queue_82599");
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/* Clear init done bit and drop queue field */
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fdirctrl = IXGBE_READ_REG(hw, IXGBE_FDIRCTRL);
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fdirctrl &= ~(IXGBE_FDIRCTRL_DROP_Q_MASK | IXGBE_FDIRCTRL_INIT_DONE);
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/* Set drop queue */
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fdirctrl |= (dropqueue << IXGBE_FDIRCTRL_DROP_Q_SHIFT);
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if ((hw->mac.type == ixgbe_mac_X550) ||
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(hw->mac.type == ixgbe_mac_X550EM_x))
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fdirctrl |= IXGBE_FDIRCTRL_DROP_NO_MATCH;
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IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
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(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) |
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IXGBE_FDIRCMD_CLEARHT));
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IXGBE_WRITE_FLUSH(hw);
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IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD,
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(IXGBE_READ_REG(hw, IXGBE_FDIRCMD) &
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~IXGBE_FDIRCMD_CLEARHT));
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IXGBE_WRITE_FLUSH(hw);
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/* write hashes and fdirctrl register, poll for completion */
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ixgbe_fdir_enable_82599(hw, fdirctrl);
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}
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/*
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* These defines allow us to quickly generate all of the necessary instructions
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* in the function below by simply calling out IXGBE_COMPUTE_SIG_HASH_ITERATION
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@ -181,6 +181,7 @@ s32 ixgbe_read_i2c_combined_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg,
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u16 *val);
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s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
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u8 data);
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void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
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s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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s32 ixgbe_write_i2c_combined(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
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@ -2838,7 +2838,9 @@ enum ixgbe_fdir_pballoc_type {
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#define IXGBE_FDIRCTRL_REPORT_STATUS 0x00000020
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#define IXGBE_FDIRCTRL_REPORT_STATUS_ALWAYS 0x00000080
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#define IXGBE_FDIRCTRL_DROP_Q_SHIFT 8
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#define IXGBE_FDIRCTRL_DROP_Q_MASK 0x00007F00
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#define IXGBE_FDIRCTRL_FLEX_SHIFT 16
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#define IXGBE_FDIRCTRL_DROP_NO_MATCH 0x00008000
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#define IXGBE_FDIRCTRL_FILTERMODE_SHIFT 21
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#define IXGBE_FDIRCTRL_FILTERMODE_MACVLAN 0x0001 /* bit 23:21, 001b */
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#define IXGBE_FDIRCTRL_FILTERMODE_CLOUD 0x0002 /* bit 23:21, 010b */
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