app/testpmd: add hairpin queue memory modes
This patch extends hairpin-mode command line option of test-pmd application with an ability to configure whether Rx/Tx hairpin queue should use locked device memory or RTE memory. For purposes of this configurations the following bits of 32 bit hairpin-mode are reserved: - Bit 8 - If set, then force_memory flag will be set for hairpin RX queue. - Bit 9 - If set, then force_memory flag will be set for hairpin TX queue. - Bits 12-15 - Memory options for hairpin Rx queue: - Bit 12 - If set, then use_locked_device_memory will be set. - Bit 13 - If set, then use_rte_memory will be set. - Bit 14 - Reserved for future use. - Bit 15 - Reserved for future use. - Bits 16-19 - Memory options for hairpin Tx queue: - Bit 16 - If set, then use_locked_device_memory will be set. - Bit 17 - If set, then use_rte_memory will be set. - Bit 18 - Reserved for future use. - Bit 19 - Reserved for future use. Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
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@ -1085,7 +1085,7 @@ launch_args_parse(int argc, char** argv)
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if (errno != 0 || end == optarg)
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rte_exit(EXIT_FAILURE, "hairpin mode invalid\n");
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else
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hairpin_mode = (uint16_t)n;
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hairpin_mode = (uint32_t)n;
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}
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if (!strcmp(lgopts[opt_idx].name, "burst")) {
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n = atoi(optarg);
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@ -409,7 +409,7 @@ bool setup_on_probe_event = true;
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uint8_t clear_ptypes = true;
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/* Hairpin ports configuration mode. */
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uint16_t hairpin_mode;
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uint32_t hairpin_mode;
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/* Pretty printing of ethdev events */
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static const char * const eth_event_desc[] = {
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@ -2519,6 +2519,16 @@ port_is_started(portid_t port_id)
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return 1;
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}
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#define HAIRPIN_MODE_RX_FORCE_MEMORY RTE_BIT32(8)
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#define HAIRPIN_MODE_TX_FORCE_MEMORY RTE_BIT32(9)
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#define HAIRPIN_MODE_RX_LOCKED_MEMORY RTE_BIT32(12)
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#define HAIRPIN_MODE_RX_RTE_MEMORY RTE_BIT32(13)
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#define HAIRPIN_MODE_TX_LOCKED_MEMORY RTE_BIT32(16)
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#define HAIRPIN_MODE_TX_RTE_MEMORY RTE_BIT32(17)
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/* Configure the Rx and Tx hairpin queues for the selected port. */
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static int
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setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi)
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@ -2534,6 +2544,12 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi)
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uint16_t peer_tx_port = pi;
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uint32_t manual = 1;
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uint32_t tx_exp = hairpin_mode & 0x10;
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uint32_t rx_force_memory = hairpin_mode & HAIRPIN_MODE_RX_FORCE_MEMORY;
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uint32_t rx_locked_memory = hairpin_mode & HAIRPIN_MODE_RX_LOCKED_MEMORY;
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uint32_t rx_rte_memory = hairpin_mode & HAIRPIN_MODE_RX_RTE_MEMORY;
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uint32_t tx_force_memory = hairpin_mode & HAIRPIN_MODE_TX_FORCE_MEMORY;
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uint32_t tx_locked_memory = hairpin_mode & HAIRPIN_MODE_TX_LOCKED_MEMORY;
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uint32_t tx_rte_memory = hairpin_mode & HAIRPIN_MODE_TX_RTE_MEMORY;
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if (!(hairpin_mode & 0xf)) {
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peer_rx_port = pi;
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@ -2573,6 +2589,9 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi)
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hairpin_conf.peers[0].queue = i + nb_rxq;
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hairpin_conf.manual_bind = !!manual;
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hairpin_conf.tx_explicit = !!tx_exp;
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hairpin_conf.force_memory = !!tx_force_memory;
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hairpin_conf.use_locked_device_memory = !!tx_locked_memory;
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hairpin_conf.use_rte_memory = !!tx_rte_memory;
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diag = rte_eth_tx_hairpin_queue_setup
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(pi, qi, nb_txd, &hairpin_conf);
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i++;
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@ -2596,6 +2615,9 @@ setup_hairpin_queues(portid_t pi, portid_t p_pi, uint16_t cnt_pi)
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hairpin_conf.peers[0].queue = i + nb_txq;
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hairpin_conf.manual_bind = !!manual;
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hairpin_conf.tx_explicit = !!tx_exp;
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hairpin_conf.force_memory = !!rx_force_memory;
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hairpin_conf.use_locked_device_memory = !!rx_locked_memory;
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hairpin_conf.use_rte_memory = !!rx_rte_memory;
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diag = rte_eth_rx_hairpin_queue_setup
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(pi, qi, nb_rxd, &hairpin_conf);
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i++;
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@ -562,7 +562,7 @@ extern uint16_t stats_period;
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extern struct rte_eth_xstat_name *xstats_display;
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extern unsigned int xstats_display_num;
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extern uint16_t hairpin_mode;
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extern uint32_t hairpin_mode;
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#ifdef RTE_LIB_LATENCYSTATS
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extern uint8_t latencystats_enabled;
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@ -529,10 +529,16 @@ The command line options are:
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Enable display of RX and TX burst stats.
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* ``--hairpin-mode=0xXX``
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* ``--hairpin-mode=0xXXXX``
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Set the hairpin port mode with bitmask, only valid when hairpin queues number is set::
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Set the hairpin port configuration with bitmask, only valid when hairpin queues number is set::
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bit 18 - hairpin TX queues will use RTE memory
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bit 16 - hairpin TX queues will use locked device memory
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bit 13 - hairpin RX queues will use RTE memory
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bit 12 - hairpin RX queues will use locked device memory
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bit 9 - force memory settings of hairpin TX queue
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bit 8 - force memory settings of hairpin RX queue
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bit 4 - explicit Tx flow rule
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bit 1 - two hairpin ports paired
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bit 0 - two hairpin ports loop
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