event/cnxk: update event vector Tx routine
Update event vector transmit routine to honor elem_offset. Use ``rte_event_vector::elem_offset`` to report partial vector transmission to the application when there is not enough space in the SQ. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
This commit is contained in:
Pavan Nikhilesh
Jerin Jacob
parent
3a304711b6
commit
2367e7e0cf
@ -532,12 +532,21 @@ cn10k_sso_txq_fc_wait(const struct cn10k_eth_txq *txq)
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;
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}
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static __rte_always_inline void
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static __rte_always_inline int32_t
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cn10k_sso_sq_depth(const struct cn10k_eth_txq *txq)
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{
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return (txq->nb_sqb_bufs_adj -
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__atomic_load_n((int16_t *)txq->fc_mem, __ATOMIC_RELAXED))
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<< txq->sqes_per_sqb_log2;
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}
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static __rte_always_inline uint16_t
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cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd,
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uint16_t lmt_id, uintptr_t lmt_addr, uint8_t sched_type,
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const uint64_t *txq_data, const uint32_t flags)
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{
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uint8_t lnum = 0, loff = 0, shft = 0;
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uint16_t ref_cnt = m->refcnt;
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struct cn10k_eth_txq *txq;
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uintptr_t laddr;
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uint16_t segdw;
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@ -545,6 +554,9 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd,
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bool sec;
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txq = cn10k_sso_hws_xtract_meta(m, txq_data);
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if (cn10k_sso_sq_depth(txq) <= 0)
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return 0;
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cn10k_nix_tx_skeleton(txq, cmd, flags, 0);
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/* Perform header writes before barrier
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* for TSO
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@ -582,55 +594,66 @@ cn10k_sso_tx_one(struct cn10k_sso_hws *ws, struct rte_mbuf *m, uint64_t *cmd,
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cn10k_sso_txq_fc_wait(txq);
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roc_lmt_submit_steorl(lmt_id, pa);
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if (flags & NIX_TX_OFFLOAD_MBUF_NOFF_F) {
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if (ref_cnt > 1)
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rte_io_wmb();
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}
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return 1;
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}
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static __rte_always_inline void
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static __rte_always_inline uint16_t
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cn10k_sso_vwqe_split_tx(struct cn10k_sso_hws *ws, struct rte_mbuf **mbufs,
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uint16_t nb_mbufs, uint64_t *cmd, uint16_t lmt_id,
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uintptr_t lmt_addr, uint8_t sched_type,
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uint16_t nb_mbufs, uint64_t *cmd,
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const uint64_t *txq_data, const uint32_t flags)
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{
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uint16_t port[4], queue[4];
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uint16_t i, j, pkts, scalar;
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uint16_t count = 0, port, queue, ret = 0, last_idx = 0;
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struct cn10k_eth_txq *txq;
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int32_t space;
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int i;
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scalar = nb_mbufs & (NIX_DESCS_PER_LOOP - 1);
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pkts = RTE_ALIGN_FLOOR(nb_mbufs, NIX_DESCS_PER_LOOP);
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for (i = 0; i < pkts; i += NIX_DESCS_PER_LOOP) {
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port[0] = mbufs[i]->port;
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port[1] = mbufs[i + 1]->port;
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port[2] = mbufs[i + 2]->port;
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port[3] = mbufs[i + 3]->port;
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queue[0] = rte_event_eth_tx_adapter_txq_get(mbufs[i]);
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queue[1] = rte_event_eth_tx_adapter_txq_get(mbufs[i + 1]);
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queue[2] = rte_event_eth_tx_adapter_txq_get(mbufs[i + 2]);
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queue[3] = rte_event_eth_tx_adapter_txq_get(mbufs[i + 3]);
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if (((port[0] ^ port[1]) & (port[2] ^ port[3])) ||
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((queue[0] ^ queue[1]) & (queue[2] ^ queue[3]))) {
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for (j = 0; j < 4; j++)
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cn10k_sso_tx_one(ws, mbufs[i + j], cmd, lmt_id,
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lmt_addr, sched_type, txq_data,
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flags);
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} else {
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txq = (struct cn10k_eth_txq
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*)(txq_data[(txq_data[port[0]] >> 48) +
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queue[0]] &
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(BIT_ULL(48) - 1));
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cn10k_nix_xmit_pkts_vector(txq, (uint64_t *)ws,
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&mbufs[i], 4, cmd,
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flags | NIX_TX_VWQE_F);
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port = mbufs[0]->port;
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queue = rte_event_eth_tx_adapter_txq_get(mbufs[0]);
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for (i = 0; i < nb_mbufs; i++) {
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if (port != mbufs[i]->port ||
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queue != rte_event_eth_tx_adapter_txq_get(mbufs[i])) {
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if (count) {
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txq = (struct cn10k_eth_txq
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*)(txq_data[(txq_data[port] >>
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48) +
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queue] &
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(BIT_ULL(48) - 1));
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/* Transmit based on queue depth */
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space = cn10k_sso_sq_depth(txq);
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if (space < count)
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goto done;
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cn10k_nix_xmit_pkts_vector(
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txq, (uint64_t *)ws, &mbufs[last_idx],
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count, cmd, flags | NIX_TX_VWQE_F);
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ret += count;
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count = 0;
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}
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port = mbufs[i]->port;
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queue = rte_event_eth_tx_adapter_txq_get(mbufs[i]);
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last_idx = i;
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}
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count++;
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}
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mbufs += i;
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for (i = 0; i < scalar; i++) {
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cn10k_sso_tx_one(ws, mbufs[i], cmd, lmt_id, lmt_addr,
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sched_type, txq_data, flags);
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if (count) {
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txq = (struct cn10k_eth_txq
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*)(txq_data[(txq_data[port] >> 48) + queue] &
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(BIT_ULL(48) - 1));
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/* Transmit based on queue depth */
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space = cn10k_sso_sq_depth(txq);
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if (space < count)
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goto done;
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cn10k_nix_xmit_pkts_vector(txq, (uint64_t *)ws,
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&mbufs[last_idx], count, cmd,
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flags | NIX_TX_VWQE_F);
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ret += count;
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}
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done:
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return ret;
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}
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static __rte_always_inline uint16_t
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@ -649,7 +672,11 @@ cn10k_sso_hws_event_tx(struct cn10k_sso_hws *ws, struct rte_event *ev,
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if (ev->event_type & RTE_EVENT_TYPE_VECTOR) {
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struct rte_mbuf **mbufs = ev->vec->mbufs;
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uint64_t meta = *(uint64_t *)ev->vec;
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uint16_t offset, nb_pkts, left;
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int32_t space;
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nb_pkts = meta & 0xFFFF;
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offset = (meta >> 16) & 0xFFF;
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if (meta & BIT(31)) {
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txq = (struct cn10k_eth_txq
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*)(txq_data[(txq_data[meta >> 32] >>
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@ -657,29 +684,35 @@ cn10k_sso_hws_event_tx(struct cn10k_sso_hws *ws, struct rte_event *ev,
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(meta >> 48)] &
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(BIT_ULL(48) - 1));
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cn10k_nix_xmit_pkts_vector(txq, (uint64_t *)ws, mbufs,
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meta & 0xFFFF, cmd,
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/* Transmit based on queue depth */
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space = cn10k_sso_sq_depth(txq);
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if (space <= 0)
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return 0;
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nb_pkts = nb_pkts < space ? nb_pkts : (uint16_t)space;
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cn10k_nix_xmit_pkts_vector(txq, (uint64_t *)ws,
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mbufs + offset, nb_pkts, cmd,
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flags | NIX_TX_VWQE_F);
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} else {
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cn10k_sso_vwqe_split_tx(
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ws, mbufs, meta & 0xFFFF, cmd, lmt_id, lmt_addr,
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ev->sched_type, txq_data, flags);
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nb_pkts = cn10k_sso_vwqe_split_tx(ws, mbufs + offset,
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nb_pkts, cmd,
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txq_data, flags);
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}
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left = (meta & 0xFFFF) - nb_pkts;
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if (!left) {
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rte_mempool_put(rte_mempool_from_obj(ev->vec), ev->vec);
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} else {
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*(uint64_t *)ev->vec =
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(meta & ~0xFFFFFFFUL) |
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(((uint32_t)nb_pkts + offset) << 16) | left;
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}
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rte_mempool_put(rte_mempool_from_obj(ev->vec), ev->vec);
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rte_prefetch0(ws);
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return 1;
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return !left;
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}
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m = ev->mbuf;
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txq = cn10k_sso_hws_xtract_meta(m, txq_data);
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if (((txq->nb_sqb_bufs_adj -
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__atomic_load_n((int16_t *)txq->fc_mem, __ATOMIC_RELAXED))
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<< txq->sqes_per_sqb_log2) <= 0)
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return 0;
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cn10k_sso_tx_one(ws, m, cmd, lmt_id, lmt_addr, ev->sched_type, txq_data,
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flags);
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return 1;
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return cn10k_sso_tx_one(ws, m, cmd, lmt_id, lmt_addr, ev->sched_type,
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txq_data, flags);
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}
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#define T(name, sz, flags) \
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