net/dpaa2: support VLAN TCI population from HW parser
This patch adds the support to update the mbuf vlan tci field from the HW parse results in annotation area. Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
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@ -213,6 +213,46 @@ struct dpaa2_annot_hdr {
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#define DPAA2_L3_IPv6_UDP (L3_IPV6_1_PRESENT | L3_IPV6_1_UNICAST | \
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L3_PROTO_UDP_PRESENT | L4_UNKNOWN_PROTOCOL)
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/**
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* Macros to get values in word5
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*/
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#define SHIM_OFFSET_1(var) ((uint64_t)(var) & 0xFF00000000000000)
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#define SHIM_OFFSET_2(var) ((uint64_t)(var) & 0x00FF000000000000)
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#define IP_PID_OFFSET(var) ((uint64_t)(var) & 0x0000FF0000000000)
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#define ETH_OFFSET(var) ((uint64_t)(var) & 0x000000FF00000000)
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#define LLC_SNAP_OFFSET(var) ((uint64_t)(var) & 0x00000000FF000000)
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#define VLAN_TCI_OFFSET_1(var) ((uint64_t)(var) & 0x0000000000FF0000)
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#define VLAN_TCI_OFFSET_N(var) ((uint64_t)(var) & 0x000000000000FF00)
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#define LAST_ETYPE_OFFSET(var) ((uint64_t)(var) & 0x00000000000000FF)
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/**
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* Macros to get values in word6
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*/
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#define PPPOE_OFFSET(var) ((uint64_t)(var) & 0xFF00000000000000)
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#define MPLS_OFFSET_1(var) ((uint64_t)(var) & 0x00FF000000000000)
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#define MPLS_OFFSET_N(var) ((uint64_t)(var) & 0x0000FF0000000000)
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#define ARP_OR_IP_OFFSET_1(var) ((uint64_t)(var) & 0x000000FF00000000)
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#define IP_N_OR_MIN_ENCAP_OFFSET(var) ((uint64_t)(var) & 0x00000000FF000000)
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#define GRE_OFFSET(var) ((uint64_t)(var) & 0x0000000000FF0000)
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#define L4_OFFSET(var) ((uint64_t)(var) & 0x000000000000FF00)
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#define GTP_OR_ESP_OR_IPSEC_OFFSET(var) ((uint64_t)(var) & 0x00000000000000FF)
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/**
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* Macros to get values in word7
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*/
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#define IPV6_ROUTING_HDR_OFFSET_1(var) ((uint64_t)(var) & 0xFF00000000000000)
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#define IPV6_ROUTING_HDR_OFFSET_2(var) ((uint64_t)(var) & 0x00FF000000000000)
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#define NEXT_HDR_OFFSET(var) ((uint64_t)(var) & 0x0000FF0000000000)
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#define IPV6_FRAG_OFFSET(var) ((uint64_t)(var) & 0x000000FF00000000)
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#define GROSS_RUNNING_SUM(var) ((uint64_t)(var) & 0x00000000FFFF0000)
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#define RUNNING_SUM(var) ((uint64_t)(var) & 0x000000000000FFFF)
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/**
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* Macros to get values in word8
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*/
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#define PARSE_ERROR_CODE(var) ((uint64_t)(var) & 0xFF00000000000000)
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#define SOFT_PARSING_CONTEXT(var) ((uint64_t)(var) & 0x00FFFFFFFFFFFFFF)
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/* Debug frame, otherwise supposed to be discarded */
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#define DPAA2_ETH_FAS_DISC 0x80000000
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/* MACSEC frame */
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@ -25,6 +25,10 @@
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#include "dpaa2_ethdev.h"
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#include "base/dpaa2_hw_dpni_annot.h"
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static inline uint32_t __attribute__((hot))
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dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
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struct dpaa2_annot_hdr *annotation);
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#define DPAA2_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid) do { \
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DPAA2_SET_FD_ADDR(_fd, DPAA2_MBUF_VADDR_TO_IOVA(_mbuf)); \
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DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \
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@ -40,8 +44,6 @@ dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd)
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{
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uint16_t frc = DPAA2_GET_FD_FRC_PARSE_SUM(fd);
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DPAA2_PMD_DP_DEBUG("frc = 0x%x\t", frc);
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m->packet_type = RTE_PTYPE_UNKNOWN;
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switch (frc) {
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case DPAA2_PKT_TYPE_ETHER:
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@ -95,31 +97,45 @@ dpaa2_dev_rx_parse_new(struct rte_mbuf *m, const struct qbman_fd *fd)
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m->packet_type = RTE_PTYPE_L2_ETHER |
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RTE_PTYPE_L3_IPV6 | RTE_PTYPE_L4_ICMP;
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break;
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case DPAA2_PKT_TYPE_VLAN_1:
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case DPAA2_PKT_TYPE_VLAN_2:
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m->ol_flags |= PKT_RX_VLAN;
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break;
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/* More switch cases can be added */
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/* TODO: Add handling for checksum error check from FRC */
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default:
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m->packet_type = RTE_PTYPE_UNKNOWN;
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m->packet_type = dpaa2_dev_rx_parse_slow(m,
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(void *)((size_t)DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd))
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+ DPAA2_FD_PTA_SIZE));
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}
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m->hash.rss = fd->simple.flc_hi;
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m->ol_flags |= PKT_RX_RSS_HASH;
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}
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static inline uint32_t __attribute__((hot))
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dpaa2_dev_rx_parse_slow(struct dpaa2_annot_hdr *annotation)
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dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
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struct dpaa2_annot_hdr *annotation)
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{
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uint32_t pkt_type = RTE_PTYPE_UNKNOWN;
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uint16_t *vlan_tci;
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DPAA2_PMD_DP_DEBUG("(slow parse)annotation(3)=0x%" PRIx64 "\t"
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"(4)=0x%" PRIx64 "\t",
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annotation->word3, annotation->word4);
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if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
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vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
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(VLAN_TCI_OFFSET_1(annotation->word5) >> 16));
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mbuf->vlan_tci = rte_be_to_cpu_16(*vlan_tci);
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mbuf->ol_flags |= PKT_RX_VLAN;
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pkt_type |= RTE_PTYPE_L2_ETHER_VLAN;
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} else if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_N_PRESENT)) {
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vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
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(VLAN_TCI_OFFSET_1(annotation->word5) >> 16));
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mbuf->vlan_tci = rte_be_to_cpu_16(*vlan_tci);
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mbuf->ol_flags |= PKT_RX_VLAN | PKT_RX_QINQ;
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pkt_type |= RTE_PTYPE_L2_ETHER_QINQ;
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}
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DPAA2_PMD_DP_DEBUG("(slow parse) Annotation = 0x%" PRIx64 "\t",
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annotation->word4);
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if (BIT_ISSET_AT_POS(annotation->word3, L2_ARP_PRESENT)) {
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pkt_type = RTE_PTYPE_L2_ETHER_ARP;
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pkt_type |= RTE_PTYPE_L2_ETHER_ARP;
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goto parse_done;
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} else if (BIT_ISSET_AT_POS(annotation->word3, L2_ETH_MAC_PRESENT)) {
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pkt_type = RTE_PTYPE_L2_ETHER;
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pkt_type |= RTE_PTYPE_L2_ETHER;
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} else {
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goto parse_done;
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}
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@ -179,16 +195,15 @@ dpaa2_dev_rx_parse(struct rte_mbuf *mbuf, void *hw_annot_addr)
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DPAA2_PMD_DP_DEBUG("(fast parse) Annotation = 0x%" PRIx64 "\t",
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annotation->word4);
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/* Check offloads first */
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if (BIT_ISSET_AT_POS(annotation->word3,
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L2_VLAN_1_PRESENT | L2_VLAN_N_PRESENT))
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mbuf->ol_flags |= PKT_RX_VLAN;
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if (BIT_ISSET_AT_POS(annotation->word8, DPAA2_ETH_FAS_L3CE))
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mbuf->ol_flags |= PKT_RX_IP_CKSUM_BAD;
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else if (BIT_ISSET_AT_POS(annotation->word8, DPAA2_ETH_FAS_L4CE))
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mbuf->ol_flags |= PKT_RX_L4_CKSUM_BAD;
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/* Check detailed parsing requirement */
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if (annotation->word3 & 0x7FFFFC3FFFF)
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return dpaa2_dev_rx_parse_slow(mbuf, annotation);
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/* Return some common types from parse processing */
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switch (annotation->word4) {
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case DPAA2_L3_IPv4:
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@ -211,7 +226,7 @@ dpaa2_dev_rx_parse(struct rte_mbuf *mbuf, void *hw_annot_addr)
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break;
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}
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return dpaa2_dev_rx_parse_slow(annotation);
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return dpaa2_dev_rx_parse_slow(mbuf, annotation);
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}
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static inline struct rte_mbuf *__attribute__((hot))
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