diff --git a/drivers/net/bnxt/tf_ulp/ulp_mapper.c b/drivers/net/bnxt/tf_ulp/ulp_mapper.c index df8041e897..3d7bf2f264 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_mapper.c +++ b/drivers/net/bnxt/tf_ulp/ulp_mapper.c @@ -2042,6 +2042,7 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, bool alloc = false; bool write = false; bool search = false; + uint64_t act_rec_size; /* use the max size if encap is enabled */ if (tbl->encap_num_fields) @@ -2286,6 +2287,17 @@ ulp_mapper_index_tbl_process(struct bnxt_ulp_mapper_parms *parms, sparms.idx, rc); goto error; } + + /* Calculate action record size */ + if (tbl->resource_type == TF_TBL_TYPE_EXT) { + act_rec_size = (ULP_BITS_2_BYTE_NR(tmplen) + 15) / 16; + act_rec_size--; + if (ulp_regfile_write(parms->regfile, + BNXT_ULP_RF_IDX_ACTION_REC_SIZE, + tfp_cpu_to_be_64(act_rec_size))) + BNXT_TF_DBG(ERR, + "Failed write the act rec size\n"); + } } /* Link the resource to the flow in the flow db */ diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c index 29ec409ee8..500bf215d9 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_act.c @@ -3,7 +3,7 @@ * All rights reserved. */ -/* date: Thu Dec 17 19:43:07 2020 */ +/* date: Tue Jan 26 15:51:49 2021 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" @@ -106,12 +106,14 @@ uint16_t ulp_act_sig_tbl[BNXT_ULP_ACT_SIG_TBL_MAX_SZ] = { struct bnxt_ulp_act_match_info ulp_act_match_list[] = { [1] = { .act_hid = BNXT_ULP_ACT_HID_0000, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_FLOW_DIR_BITMASK_ING }, .act_tid = 1 }, [2] = { .act_hid = BNXT_ULP_ACT_HID_0001, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -119,6 +121,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [3] = { .act_hid = BNXT_ULP_ACT_HID_0400, + .act_pattern_id = 2, .act_sig = { .bits = BNXT_ULP_ACT_BIT_POP_VLAN | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -126,6 +129,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [4] = { .act_hid = BNXT_ULP_ACT_HID_01ab, + .act_pattern_id = 3, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -133,6 +137,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [5] = { .act_hid = BNXT_ULP_ACT_HID_0010, + .act_pattern_id = 4, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -140,6 +145,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [6] = { .act_hid = BNXT_ULP_ACT_HID_05ab, + .act_pattern_id = 5, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_POP_VLAN | @@ -148,6 +154,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [7] = { .act_hid = BNXT_ULP_ACT_HID_01bb, + .act_pattern_id = 6, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_DECAP | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -156,6 +163,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [8] = { .act_hid = BNXT_ULP_ACT_HID_0002, + .act_pattern_id = 7, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -163,6 +171,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [9] = { .act_hid = BNXT_ULP_ACT_HID_0003, + .act_pattern_id = 8, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DROP | @@ -171,6 +180,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [10] = { .act_hid = BNXT_ULP_ACT_HID_0402, + .act_pattern_id = 9, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_POP_VLAN | @@ -179,6 +189,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [11] = { .act_hid = BNXT_ULP_ACT_HID_01ad, + .act_pattern_id = 10, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -187,6 +198,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [12] = { .act_hid = BNXT_ULP_ACT_HID_0012, + .act_pattern_id = 11, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_VXLAN_DECAP | @@ -195,6 +207,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [13] = { .act_hid = BNXT_ULP_ACT_HID_05ad, + .act_pattern_id = 12, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -204,6 +217,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [14] = { .act_hid = BNXT_ULP_ACT_HID_01bd, + .act_pattern_id = 13, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_VXLAN_DECAP | @@ -213,6 +227,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [15] = { .act_hid = BNXT_ULP_ACT_HID_0613, + .act_pattern_id = 14, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DROP | @@ -221,6 +236,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [16] = { .act_hid = BNXT_ULP_ACT_HID_02a9, + .act_pattern_id = 15, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_POP_VLAN | @@ -229,6 +245,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [17] = { .act_hid = BNXT_ULP_ACT_HID_0054, + .act_pattern_id = 16, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -237,6 +254,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [18] = { .act_hid = BNXT_ULP_ACT_HID_0622, + .act_pattern_id = 17, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_VXLAN_DECAP | @@ -245,6 +263,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [19] = { .act_hid = BNXT_ULP_ACT_HID_0454, + .act_pattern_id = 18, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -254,6 +273,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [20] = { .act_hid = BNXT_ULP_ACT_HID_0064, + .act_pattern_id = 19, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_VXLAN_DECAP | @@ -263,6 +283,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [21] = { .act_hid = BNXT_ULP_ACT_HID_0614, + .act_pattern_id = 20, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -271,6 +292,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [22] = { .act_hid = BNXT_ULP_ACT_HID_0615, + .act_pattern_id = 21, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -280,6 +302,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [23] = { .act_hid = BNXT_ULP_ACT_HID_02ab, + .act_pattern_id = 22, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -289,6 +312,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [24] = { .act_hid = BNXT_ULP_ACT_HID_0056, + .act_pattern_id = 23, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -298,6 +322,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [25] = { .act_hid = BNXT_ULP_ACT_HID_0624, + .act_pattern_id = 24, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -307,6 +332,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [26] = { .act_hid = BNXT_ULP_ACT_HID_0456, + .act_pattern_id = 25, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -317,6 +343,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [27] = { .act_hid = BNXT_ULP_ACT_HID_0066, + .act_pattern_id = 26, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED_SAMPLE | BNXT_ULP_ACT_BIT_COUNT | @@ -327,6 +354,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [28] = { .act_hid = BNXT_ULP_ACT_HID_048d, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED | BNXT_ULP_ACT_BIT_SAMPLE | @@ -335,6 +363,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [29] = { .act_hid = BNXT_ULP_ACT_HID_048f, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SHARED | BNXT_ULP_ACT_BIT_SAMPLE | @@ -344,6 +373,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [30] = { .act_hid = BNXT_ULP_ACT_HID_04bc, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -351,6 +381,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [31] = { .act_hid = BNXT_ULP_ACT_HID_00a9, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | @@ -359,6 +390,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [32] = { .act_hid = BNXT_ULP_ACT_HID_020f, + .act_pattern_id = 2, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_ING }, @@ -366,6 +398,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [33] = { .act_hid = BNXT_ULP_ACT_HID_04a9, + .act_pattern_id = 3, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | @@ -375,6 +408,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [34] = { .act_hid = BNXT_ULP_ACT_HID_01fc, + .act_pattern_id = 4, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -385,6 +419,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [35] = { .act_hid = BNXT_ULP_ACT_HID_04be, + .act_pattern_id = 5, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -393,6 +428,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [36] = { .act_hid = BNXT_ULP_ACT_HID_00ab, + .act_pattern_id = 6, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -402,6 +438,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [37] = { .act_hid = BNXT_ULP_ACT_HID_0211, + .act_pattern_id = 7, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -410,6 +447,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [38] = { .act_hid = BNXT_ULP_ACT_HID_04ab, + .act_pattern_id = 8, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -420,6 +458,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [39] = { .act_hid = BNXT_ULP_ACT_HID_01fe, + .act_pattern_id = 9, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -431,6 +470,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [40] = { .act_hid = BNXT_ULP_ACT_HID_0667, + .act_pattern_id = 10, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -439,6 +479,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [41] = { .act_hid = BNXT_ULP_ACT_HID_0254, + .act_pattern_id = 11, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -448,6 +489,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [42] = { .act_hid = BNXT_ULP_ACT_HID_03ba, + .act_pattern_id = 12, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -456,6 +498,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [43] = { .act_hid = BNXT_ULP_ACT_HID_0654, + .act_pattern_id = 13, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -466,6 +509,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [44] = { .act_hid = BNXT_ULP_ACT_HID_03a7, + .act_pattern_id = 14, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -477,6 +521,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [45] = { .act_hid = BNXT_ULP_ACT_HID_0669, + .act_pattern_id = 15, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -486,6 +531,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [46] = { .act_hid = BNXT_ULP_ACT_HID_0256, + .act_pattern_id = 16, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -496,6 +542,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [47] = { .act_hid = BNXT_ULP_ACT_HID_03bc, + .act_pattern_id = 17, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -505,6 +552,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [48] = { .act_hid = BNXT_ULP_ACT_HID_0656, + .act_pattern_id = 18, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -516,6 +564,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [49] = { .act_hid = BNXT_ULP_ACT_HID_03a9, + .act_pattern_id = 19, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -528,12 +577,14 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [50] = { .act_hid = BNXT_ULP_ACT_HID_021b, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_FLOW_DIR_BITMASK_EGR }, .act_tid = 4 }, [51] = { .act_hid = BNXT_ULP_ACT_HID_021c, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -541,6 +592,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [52] = { .act_hid = BNXT_ULP_ACT_HID_021e, + .act_pattern_id = 2, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DROP | BNXT_ULP_ACT_BIT_COUNT | @@ -549,6 +601,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [53] = { .act_hid = BNXT_ULP_ACT_HID_063f, + .act_pattern_id = 3, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_VLAN_PCP | BNXT_ULP_ACT_BIT_SET_VLAN_VID | @@ -558,6 +611,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [54] = { .act_hid = BNXT_ULP_ACT_HID_0510, + .act_pattern_id = 4, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_VLAN_VID | BNXT_ULP_ACT_BIT_PUSH_VLAN | @@ -566,6 +620,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [55] = { .act_hid = BNXT_ULP_ACT_HID_03c6, + .act_pattern_id = 5, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -573,6 +628,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [56] = { .act_hid = BNXT_ULP_ACT_HID_0082, + .act_pattern_id = 6, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_VLAN_PCP | @@ -583,6 +639,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [57] = { .act_hid = BNXT_ULP_ACT_HID_06bb, + .act_pattern_id = 7, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_VLAN_VID | @@ -592,6 +649,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [58] = { .act_hid = BNXT_ULP_ACT_HID_021d, + .act_pattern_id = 8, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -599,6 +657,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [59] = { .act_hid = BNXT_ULP_ACT_HID_0641, + .act_pattern_id = 9, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_VLAN_PCP | @@ -609,6 +668,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [60] = { .act_hid = BNXT_ULP_ACT_HID_0512, + .act_pattern_id = 10, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_VLAN_VID | @@ -618,6 +678,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [61] = { .act_hid = BNXT_ULP_ACT_HID_03c8, + .act_pattern_id = 11, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -626,6 +687,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [62] = { .act_hid = BNXT_ULP_ACT_HID_0084, + .act_pattern_id = 12, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -637,6 +699,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [63] = { .act_hid = BNXT_ULP_ACT_HID_06bd, + .act_pattern_id = 13, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_DEC_TTL | @@ -647,6 +710,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [64] = { .act_hid = BNXT_ULP_ACT_HID_06d7, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -654,6 +718,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [65] = { .act_hid = BNXT_ULP_ACT_HID_02c4, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_TP_SRC | @@ -662,6 +727,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [66] = { .act_hid = BNXT_ULP_ACT_HID_042a, + .act_pattern_id = 2, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -669,6 +735,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [67] = { .act_hid = BNXT_ULP_ACT_HID_06c4, + .act_pattern_id = 3, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_DST | BNXT_ULP_ACT_BIT_SET_TP_SRC | @@ -678,6 +745,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [68] = { .act_hid = BNXT_ULP_ACT_HID_0417, + .act_pattern_id = 4, .act_sig = { .bits = BNXT_ULP_ACT_BIT_SET_IPV4_SRC | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -688,6 +756,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [69] = { .act_hid = BNXT_ULP_ACT_HID_06d9, + .act_pattern_id = 5, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -696,6 +765,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [70] = { .act_hid = BNXT_ULP_ACT_HID_02c6, + .act_pattern_id = 6, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -705,6 +775,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [71] = { .act_hid = BNXT_ULP_ACT_HID_042c, + .act_pattern_id = 7, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -713,6 +784,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [72] = { .act_hid = BNXT_ULP_ACT_HID_06c6, + .act_pattern_id = 8, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -723,6 +795,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [73] = { .act_hid = BNXT_ULP_ACT_HID_0419, + .act_pattern_id = 9, .act_sig = { .bits = BNXT_ULP_ACT_BIT_COUNT | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -734,6 +807,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [74] = { .act_hid = BNXT_ULP_ACT_HID_0119, + .act_pattern_id = 10, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -742,6 +816,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [75] = { .act_hid = BNXT_ULP_ACT_HID_046f, + .act_pattern_id = 11, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -751,6 +826,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [76] = { .act_hid = BNXT_ULP_ACT_HID_05d5, + .act_pattern_id = 12, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -759,6 +835,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [77] = { .act_hid = BNXT_ULP_ACT_HID_0106, + .act_pattern_id = 13, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_DST | @@ -769,6 +846,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [78] = { .act_hid = BNXT_ULP_ACT_HID_05c2, + .act_pattern_id = 14, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_SET_IPV4_SRC | @@ -780,6 +858,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [79] = { .act_hid = BNXT_ULP_ACT_HID_011b, + .act_pattern_id = 15, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -789,6 +868,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [80] = { .act_hid = BNXT_ULP_ACT_HID_0471, + .act_pattern_id = 16, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -799,6 +879,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [81] = { .act_hid = BNXT_ULP_ACT_HID_05d7, + .act_pattern_id = 17, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -808,6 +889,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [82] = { .act_hid = BNXT_ULP_ACT_HID_0108, + .act_pattern_id = 18, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -819,6 +901,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [83] = { .act_hid = BNXT_ULP_ACT_HID_05c4, + .act_pattern_id = 19, .act_sig = { .bits = BNXT_ULP_ACT_BIT_DEC_TTL | BNXT_ULP_ACT_BIT_COUNT | @@ -831,6 +914,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [84] = { .act_hid = BNXT_ULP_ACT_HID_00a2, + .act_pattern_id = 0, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_ENCAP | BNXT_ULP_FLOW_DIR_BITMASK_EGR }, @@ -838,6 +922,7 @@ struct bnxt_ulp_act_match_info ulp_act_match_list[] = { }, [85] = { .act_hid = BNXT_ULP_ACT_HID_00a4, + .act_pattern_id = 1, .act_sig = { .bits = BNXT_ULP_ACT_BIT_VXLAN_ENCAP | BNXT_ULP_ACT_BIT_COUNT | diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h index 5e839107a8..6c4950d649 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_enum.h @@ -3,12 +3,12 @@ * All rights reserved. */ -/* date: Thu Dec 17 19:43:07 2020 */ +/* date: Tue Jan 26 15:51:49 2021 */ #ifndef ULP_TEMPLATE_DB_H_ #define ULP_TEMPLATE_DB_H_ -#define BNXT_ULP_REGFILE_MAX_SZ 32 +#define BNXT_ULP_REGFILE_MAX_SZ 34 #define BNXT_ULP_MAX_NUM_DEVICES 4 #define BNXT_ULP_LOG2_MAX_NUM_DEV 2 #define BNXT_ULP_GEN_TBL_MAX_SZ 6 @@ -30,13 +30,13 @@ #define BNXT_ULP_GLB_TEMPLATE_TBL_MAX_SZ 1 #define BNXT_ULP_GLB_FIELD_TBL_SHIFT 7 #define BNXT_ULP_HDR_SIG_ID_SHIFT 4 -#define BNXT_ULP_GLB_FIELD_TBL_SIZE 5593 +#define BNXT_ULP_GLB_FIELD_TBL_SIZE 5595 #define ULP_WH_PLUS_CLASS_TMPL_LIST_SIZE 8 #define ULP_WH_PLUS_CLASS_TBL_LIST_SIZE 63 -#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 412 +#define ULP_WH_PLUS_CLASS_KEY_INFO_LIST_SIZE 410 #define ULP_WH_PLUS_CLASS_IDENT_LIST_SIZE 17 #define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 503 -#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 16 +#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 18 #define ULP_STINGRAY_CLASS_TMPL_LIST_SIZE 7 #define ULP_STINGRAY_CLASS_TBL_LIST_SIZE 38 #define ULP_STINGRAY_CLASS_KEY_INFO_LIST_SIZE 192 @@ -392,7 +392,9 @@ enum bnxt_ulp_rf_idx { BNXT_ULP_RF_IDX_HDR_SIG_ID = 29, BNXT_ULP_RF_IDX_FLOW_SIG_ID = 30, BNXT_ULP_RF_IDX_RID = 31, - BNXT_ULP_RF_IDX_LAST = 32 + BNXT_ULP_RF_IDX_WC_KEY_ID_0 = 32, + BNXT_ULP_RF_IDX_EM_KEY_ID_0 = 33, + BNXT_ULP_RF_IDX_LAST = 34 }; enum bnxt_ulp_tcam_tbl_opc { @@ -4941,4 +4943,5 @@ enum bnxt_ulp_df_tpl { BNXT_ULP_DF_TPL_VF_TO_VFREP = 6, BNXT_ULP_DF_TPL_LOOPBACK_ACTION_REC = 7 }; + #endif diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h index a6a4b472f4..0823a1300c 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_field.h @@ -17,6 +17,8 @@ enum bnxt_ulp_glb_hf { BNXT_ULP_GLB_HF_ID_I_ETH_SMAC, BNXT_ULP_GLB_HF_ID_O_ETH_TYPE, BNXT_ULP_GLB_HF_ID_I_ETH_TYPE, + BNXT_ULP_GLB_HF_ID_T_GRE_VER, + BNXT_ULP_GLB_HF_ID_T_GRE_PROTO_TYPE, BNXT_ULP_GLB_HF_ID_O_IPV4_VER, BNXT_ULP_GLB_HF_ID_I_IPV4_VER, BNXT_ULP_GLB_HF_ID_O_IPV4_TOS, diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c index 64cf6534b9..26e0ddfb1e 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_tbl.c @@ -316,476 +316,476 @@ uint8_t ulp_glb_field_tbl[] = { [2050] = 2, [2052] = 3, [2054] = 4, - [2056] = 5, - [2058] = 6, - [2060] = 7, - [2062] = 8, - [2064] = 9, - [2066] = 10, - [2068] = 11, - [2070] = 12, - [2072] = 13, - [2074] = 14, + [2058] = 5, + [2060] = 6, + [2062] = 7, + [2064] = 8, + [2066] = 9, + [2068] = 10, + [2070] = 11, + [2072] = 12, + [2074] = 13, + [2076] = 14, [2176] = 0, [2177] = 1, [2178] = 2, [2180] = 3, [2182] = 4, - [2184] = 5, - [2186] = 6, - [2188] = 7, - [2190] = 8, - [2192] = 9, - [2194] = 10, - [2196] = 11, - [2198] = 12, - [2200] = 13, - [2202] = 14, - [2230] = 15, - [2232] = 16, - [2234] = 17, - [2236] = 18, - [2238] = 19, - [2240] = 20, - [2242] = 21, - [2244] = 22, - [2246] = 23, + [2186] = 5, + [2188] = 6, + [2190] = 7, + [2192] = 8, + [2194] = 9, + [2196] = 10, + [2198] = 11, + [2200] = 12, + [2202] = 13, + [2204] = 14, + [2232] = 15, + [2234] = 16, + [2236] = 17, + [2238] = 18, + [2240] = 19, + [2242] = 20, + [2244] = 21, + [2246] = 22, + [2248] = 23, [2304] = 0, [2305] = 1, [2306] = 2, [2308] = 3, [2310] = 4, - [2312] = 5, - [2314] = 6, - [2316] = 7, - [2318] = 8, - [2320] = 9, - [2322] = 10, - [2324] = 11, - [2326] = 12, - [2328] = 13, - [2330] = 14, - [2376] = 15, - [2378] = 16, - [2380] = 17, - [2382] = 18, + [2314] = 5, + [2316] = 6, + [2318] = 7, + [2320] = 8, + [2322] = 9, + [2324] = 10, + [2326] = 11, + [2328] = 12, + [2330] = 13, + [2332] = 14, + [2378] = 15, + [2380] = 16, + [2382] = 17, + [2384] = 18, [2432] = 0, [2433] = 1, [2434] = 2, [2436] = 3, [2438] = 4, - [2460] = 5, - [2462] = 6, - [2464] = 7, - [2466] = 8, - [2468] = 9, - [2470] = 10, - [2472] = 11, - [2474] = 12, + [2462] = 5, + [2464] = 6, + [2466] = 7, + [2468] = 8, + [2470] = 9, + [2472] = 10, + [2474] = 11, + [2476] = 12, [2560] = 0, [2561] = 1, [2562] = 2, [2564] = 3, [2566] = 4, - [2588] = 5, - [2590] = 6, - [2592] = 7, - [2594] = 8, - [2596] = 9, - [2598] = 10, - [2600] = 11, - [2602] = 12, - [2614] = 13, - [2616] = 14, - [2618] = 15, - [2620] = 16, - [2622] = 17, - [2624] = 18, - [2626] = 19, - [2628] = 20, - [2630] = 21, + [2590] = 5, + [2592] = 6, + [2594] = 7, + [2596] = 8, + [2598] = 9, + [2600] = 10, + [2602] = 11, + [2604] = 12, + [2616] = 13, + [2618] = 14, + [2620] = 15, + [2622] = 16, + [2624] = 17, + [2626] = 18, + [2628] = 19, + [2630] = 20, + [2632] = 21, [2688] = 0, [2689] = 1, [2690] = 2, [2692] = 3, [2694] = 4, - [2716] = 5, - [2718] = 6, - [2720] = 7, - [2722] = 8, - [2724] = 9, - [2726] = 10, - [2728] = 11, - [2730] = 12, - [2760] = 13, - [2762] = 14, - [2764] = 15, - [2766] = 16, + [2718] = 5, + [2720] = 6, + [2722] = 7, + [2724] = 8, + [2726] = 9, + [2728] = 10, + [2730] = 11, + [2732] = 12, + [2762] = 13, + [2764] = 14, + [2766] = 15, + [2768] = 16, [2816] = 0, [2817] = 1, [2818] = 2, [2820] = 3, [2822] = 4, - [2824] = 8, - [2826] = 9, - [2828] = 10, - [2830] = 11, - [2832] = 12, - [2834] = 13, - [2836] = 14, - [2838] = 15, - [2840] = 16, - [2842] = 17, - [2896] = 5, - [2900] = 6, - [2904] = 7, + [2826] = 8, + [2828] = 9, + [2830] = 10, + [2832] = 11, + [2834] = 12, + [2836] = 13, + [2838] = 14, + [2840] = 15, + [2842] = 16, + [2844] = 17, + [2898] = 5, + [2902] = 6, + [2906] = 7, [2944] = 0, [2945] = 1, [2946] = 2, [2948] = 3, [2950] = 4, - [2952] = 8, - [2954] = 9, - [2956] = 10, - [2958] = 11, - [2960] = 12, - [2962] = 13, - [2964] = 14, - [2966] = 15, - [2968] = 16, - [2970] = 17, - [2998] = 18, - [3000] = 19, - [3002] = 20, - [3004] = 21, - [3006] = 22, - [3008] = 23, - [3010] = 24, - [3012] = 25, - [3014] = 26, - [3024] = 5, - [3028] = 6, - [3032] = 7, + [2954] = 8, + [2956] = 9, + [2958] = 10, + [2960] = 11, + [2962] = 12, + [2964] = 13, + [2966] = 14, + [2968] = 15, + [2970] = 16, + [2972] = 17, + [3000] = 18, + [3002] = 19, + [3004] = 20, + [3006] = 21, + [3008] = 22, + [3010] = 23, + [3012] = 24, + [3014] = 25, + [3016] = 26, + [3026] = 5, + [3030] = 6, + [3034] = 7, [3072] = 0, [3073] = 1, [3074] = 2, [3076] = 3, [3078] = 4, - [3080] = 8, - [3082] = 9, - [3084] = 10, - [3086] = 11, - [3088] = 12, - [3090] = 13, - [3092] = 14, - [3094] = 15, - [3096] = 16, - [3098] = 17, - [3144] = 18, - [3146] = 19, - [3148] = 20, - [3150] = 21, - [3152] = 5, - [3156] = 6, - [3160] = 7, + [3082] = 8, + [3084] = 9, + [3086] = 10, + [3088] = 11, + [3090] = 12, + [3092] = 13, + [3094] = 14, + [3096] = 15, + [3098] = 16, + [3100] = 17, + [3146] = 18, + [3148] = 19, + [3150] = 20, + [3152] = 21, + [3154] = 5, + [3158] = 6, + [3162] = 7, [3200] = 0, [3201] = 1, [3202] = 2, [3204] = 3, [3206] = 4, - [3228] = 8, - [3230] = 9, - [3232] = 10, - [3234] = 11, - [3236] = 12, - [3238] = 13, - [3240] = 14, - [3242] = 15, - [3280] = 5, - [3284] = 6, - [3288] = 7, + [3230] = 8, + [3232] = 9, + [3234] = 10, + [3236] = 11, + [3238] = 12, + [3240] = 13, + [3242] = 14, + [3244] = 15, + [3282] = 5, + [3286] = 6, + [3290] = 7, [3328] = 0, [3329] = 1, [3330] = 2, [3332] = 3, [3334] = 4, - [3356] = 8, - [3358] = 9, - [3360] = 10, - [3362] = 11, - [3364] = 12, - [3366] = 13, - [3368] = 14, - [3370] = 15, - [3382] = 16, - [3384] = 17, - [3386] = 18, - [3388] = 19, - [3390] = 20, - [3392] = 21, - [3394] = 22, - [3396] = 23, - [3398] = 24, - [3408] = 5, - [3412] = 6, - [3416] = 7, + [3358] = 8, + [3360] = 9, + [3362] = 10, + [3364] = 11, + [3366] = 12, + [3368] = 13, + [3370] = 14, + [3372] = 15, + [3384] = 16, + [3386] = 17, + [3388] = 18, + [3390] = 19, + [3392] = 20, + [3394] = 21, + [3396] = 22, + [3398] = 23, + [3400] = 24, + [3410] = 5, + [3414] = 6, + [3418] = 7, [3456] = 0, [3457] = 1, [3458] = 2, [3460] = 3, [3462] = 4, - [3484] = 8, - [3486] = 9, - [3488] = 10, - [3490] = 11, - [3492] = 12, - [3494] = 13, - [3496] = 14, - [3498] = 15, - [3528] = 16, - [3530] = 17, - [3532] = 18, - [3534] = 19, - [3536] = 5, - [3540] = 6, - [3544] = 7, + [3486] = 8, + [3488] = 9, + [3490] = 10, + [3492] = 11, + [3494] = 12, + [3496] = 13, + [3498] = 14, + [3500] = 15, + [3530] = 16, + [3532] = 17, + [3534] = 18, + [3536] = 19, + [3538] = 5, + [3542] = 6, + [3546] = 7, [4096] = 0, [4097] = 1, [4098] = 2, [4100] = 3, [4102] = 4, - [4104] = 5, - [4106] = 6, - [4108] = 7, - [4110] = 8, - [4112] = 9, - [4114] = 10, - [4116] = 11, - [4118] = 12, - [4120] = 13, - [4122] = 14, + [4106] = 5, + [4108] = 6, + [4110] = 7, + [4112] = 8, + [4114] = 9, + [4116] = 10, + [4118] = 11, + [4120] = 12, + [4122] = 13, + [4124] = 14, [4224] = 0, [4225] = 1, [4226] = 2, [4228] = 3, [4230] = 4, - [4232] = 5, - [4234] = 6, - [4236] = 7, - [4238] = 8, - [4240] = 9, - [4242] = 10, - [4244] = 11, - [4246] = 12, - [4248] = 13, - [4250] = 14, - [4278] = 15, - [4280] = 16, - [4282] = 17, - [4284] = 18, - [4286] = 19, - [4288] = 20, - [4290] = 21, - [4292] = 22, - [4294] = 23, + [4234] = 5, + [4236] = 6, + [4238] = 7, + [4240] = 8, + [4242] = 9, + [4244] = 10, + [4246] = 11, + [4248] = 12, + [4250] = 13, + [4252] = 14, + [4280] = 15, + [4282] = 16, + [4284] = 17, + [4286] = 18, + [4288] = 19, + [4290] = 20, + [4292] = 21, + [4294] = 22, + [4296] = 23, [4352] = 0, [4353] = 1, [4354] = 2, [4356] = 3, [4358] = 4, - [4360] = 5, - [4362] = 6, - [4364] = 7, - [4366] = 8, - [4368] = 9, - [4370] = 10, - [4372] = 11, - [4374] = 12, - [4376] = 13, - [4378] = 14, - [4424] = 15, - [4426] = 16, - [4428] = 17, - [4430] = 18, + [4362] = 5, + [4364] = 6, + [4366] = 7, + [4368] = 8, + [4370] = 9, + [4372] = 10, + [4374] = 11, + [4376] = 12, + [4378] = 13, + [4380] = 14, + [4426] = 15, + [4428] = 16, + [4430] = 17, + [4432] = 18, [4480] = 0, [4481] = 1, [4482] = 2, [4484] = 3, [4486] = 4, - [4508] = 5, - [4510] = 6, - [4512] = 7, - [4514] = 8, - [4516] = 9, - [4518] = 10, - [4520] = 11, - [4522] = 12, + [4510] = 5, + [4512] = 6, + [4514] = 7, + [4516] = 8, + [4518] = 9, + [4520] = 10, + [4522] = 11, + [4524] = 12, [4608] = 0, [4609] = 1, [4610] = 2, [4612] = 3, [4614] = 4, - [4636] = 5, - [4638] = 6, - [4640] = 7, - [4642] = 8, - [4644] = 9, - [4646] = 10, - [4648] = 11, - [4650] = 12, - [4662] = 13, - [4664] = 14, - [4666] = 15, - [4668] = 16, - [4670] = 17, - [4672] = 18, - [4674] = 19, - [4676] = 20, - [4678] = 21, + [4638] = 5, + [4640] = 6, + [4642] = 7, + [4644] = 8, + [4646] = 9, + [4648] = 10, + [4650] = 11, + [4652] = 12, + [4664] = 13, + [4666] = 14, + [4668] = 15, + [4670] = 16, + [4672] = 17, + [4674] = 18, + [4676] = 19, + [4678] = 20, + [4680] = 21, [4736] = 0, [4737] = 1, [4738] = 2, [4740] = 3, [4742] = 4, - [4764] = 5, - [4766] = 6, - [4768] = 7, - [4770] = 8, - [4772] = 9, - [4774] = 10, - [4776] = 11, - [4778] = 12, - [4808] = 13, - [4810] = 14, - [4812] = 15, - [4814] = 16, + [4766] = 5, + [4768] = 6, + [4770] = 7, + [4772] = 8, + [4774] = 9, + [4776] = 10, + [4778] = 11, + [4780] = 12, + [4810] = 13, + [4812] = 14, + [4814] = 15, + [4816] = 16, [4864] = 0, [4865] = 1, [4866] = 2, [4868] = 3, [4870] = 4, - [4872] = 8, - [4874] = 9, - [4876] = 10, - [4878] = 11, - [4880] = 12, - [4882] = 13, - [4884] = 14, - [4886] = 15, - [4888] = 16, - [4890] = 17, - [4944] = 5, - [4948] = 6, - [4952] = 7, + [4874] = 8, + [4876] = 9, + [4878] = 10, + [4880] = 11, + [4882] = 12, + [4884] = 13, + [4886] = 14, + [4888] = 15, + [4890] = 16, + [4892] = 17, + [4946] = 5, + [4950] = 6, + [4954] = 7, [4992] = 0, [4993] = 1, [4994] = 2, [4996] = 3, [4998] = 4, - [5000] = 8, - [5002] = 9, - [5004] = 10, - [5006] = 11, - [5008] = 12, - [5010] = 13, - [5012] = 14, - [5014] = 15, - [5016] = 16, - [5018] = 17, - [5046] = 18, - [5048] = 19, - [5050] = 20, - [5052] = 21, - [5054] = 22, - [5056] = 23, - [5058] = 24, - [5060] = 25, - [5062] = 26, - [5072] = 5, - [5076] = 6, - [5080] = 7, + [5002] = 8, + [5004] = 9, + [5006] = 10, + [5008] = 11, + [5010] = 12, + [5012] = 13, + [5014] = 14, + [5016] = 15, + [5018] = 16, + [5020] = 17, + [5048] = 18, + [5050] = 19, + [5052] = 20, + [5054] = 21, + [5056] = 22, + [5058] = 23, + [5060] = 24, + [5062] = 25, + [5064] = 26, + [5074] = 5, + [5078] = 6, + [5082] = 7, [5120] = 0, [5121] = 1, [5122] = 2, [5124] = 3, [5126] = 4, - [5128] = 8, - [5130] = 9, - [5132] = 10, - [5134] = 11, - [5136] = 12, - [5138] = 13, - [5140] = 14, - [5142] = 15, - [5144] = 16, - [5146] = 17, - [5192] = 18, - [5194] = 19, - [5196] = 20, - [5198] = 21, - [5200] = 5, - [5204] = 6, - [5208] = 7, + [5130] = 8, + [5132] = 9, + [5134] = 10, + [5136] = 11, + [5138] = 12, + [5140] = 13, + [5142] = 14, + [5144] = 15, + [5146] = 16, + [5148] = 17, + [5194] = 18, + [5196] = 19, + [5198] = 20, + [5200] = 21, + [5202] = 5, + [5206] = 6, + [5210] = 7, [5248] = 0, [5249] = 1, [5250] = 2, [5252] = 3, [5254] = 4, - [5276] = 8, - [5278] = 9, - [5280] = 10, - [5282] = 11, - [5284] = 12, - [5286] = 13, - [5288] = 14, - [5290] = 15, - [5328] = 5, - [5332] = 6, - [5336] = 7, + [5278] = 8, + [5280] = 9, + [5282] = 10, + [5284] = 11, + [5286] = 12, + [5288] = 13, + [5290] = 14, + [5292] = 15, + [5330] = 5, + [5334] = 6, + [5338] = 7, [5376] = 0, [5377] = 1, [5378] = 2, [5380] = 3, [5382] = 4, - [5404] = 8, - [5406] = 9, - [5408] = 10, - [5410] = 11, - [5412] = 12, - [5414] = 13, - [5416] = 14, - [5418] = 15, - [5430] = 16, - [5432] = 17, - [5434] = 18, - [5436] = 19, - [5438] = 20, - [5440] = 21, - [5442] = 22, - [5444] = 23, - [5446] = 24, - [5456] = 5, - [5460] = 6, - [5464] = 7, + [5406] = 8, + [5408] = 9, + [5410] = 10, + [5412] = 11, + [5414] = 12, + [5416] = 13, + [5418] = 14, + [5420] = 15, + [5432] = 16, + [5434] = 17, + [5436] = 18, + [5438] = 19, + [5440] = 20, + [5442] = 21, + [5444] = 22, + [5446] = 23, + [5448] = 24, + [5458] = 5, + [5462] = 6, + [5466] = 7, [5504] = 0, [5505] = 1, [5506] = 2, [5508] = 3, [5510] = 4, - [5532] = 8, - [5534] = 9, - [5536] = 10, - [5538] = 11, - [5540] = 12, - [5542] = 13, - [5544] = 14, - [5546] = 15, - [5576] = 16, - [5578] = 17, - [5580] = 18, - [5582] = 19, - [5584] = 5, - [5588] = 6, - [5592] = 7 + [5534] = 8, + [5536] = 9, + [5538] = 10, + [5540] = 11, + [5542] = 12, + [5544] = 13, + [5546] = 14, + [5548] = 15, + [5578] = 16, + [5580] = 17, + [5582] = 18, + [5584] = 19, + [5586] = 5, + [5590] = 6, + [5594] = 7 }; diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c index 8cc81b1451..c3109cd85b 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_act.c @@ -3,7 +3,7 @@ * All rights reserved. */ -/* date: Thu Dec 17 19:43:07 2020 */ +/* date: Tue Jan 26 15:51:49 2021 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" @@ -627,7 +627,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_act_tbl_list[] = { .result_bit_size = 32, .result_num_fields = 1 }, - { /* act_tid: 5, wh_plus, table: int_encap_mac_record.0 */ + { /* act_tid: 5, wh_plus, table: int_encap_mac_record.dummy */ .resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE, .resource_type = TF_TBL_TYPE_ACT_ENCAP_16B, .resource_sub_type = @@ -960,6 +960,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_act_key_info_list[] = { .field_info_spec = { .description = "shared_index", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -981,6 +982,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_act_key_info_list[] = { .field_info_spec = { .description = "shared_index", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1056,6 +1058,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_tpid", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1065,6 +1068,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1081,6 +1085,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_pcp", .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1098,6 +1103,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1128,6 +1134,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1164,6 +1171,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1173,6 +1181,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1182,6 +1191,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -1201,6 +1211,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1210,6 +1221,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -1250,6 +1262,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1259,6 +1272,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1268,6 +1282,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, @@ -1288,6 +1303,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1297,6 +1313,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "pop_vlan", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1319,6 +1336,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "mirror", .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SHARED_SAMPLE >> 56) & 0xff, @@ -1338,6 +1356,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "drop", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1368,6 +1387,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1398,6 +1418,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1455,6 +1476,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1464,6 +1486,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -1483,6 +1506,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1492,6 +1516,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -1532,6 +1557,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1541,6 +1567,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1550,6 +1577,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_VXLAN_DECAP >> 56) & 0xff, @@ -1570,6 +1598,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1579,6 +1608,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "pop_vlan", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1601,6 +1631,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "mirror", .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1610,6 +1641,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "drop", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1765,6 +1797,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1795,6 +1828,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -1908,6 +1942,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -1965,6 +2000,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -1995,6 +2031,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -2122,6 +2159,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -2131,6 +2169,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "pop_vlan", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -2259,6 +2298,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2306,6 +2346,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2337,6 +2378,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv4_addr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -2347,6 +2389,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv4_addr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -2446,6 +2489,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2476,6 +2520,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -2512,6 +2557,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -2521,6 +2567,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2530,6 +2577,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -2549,6 +2597,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2558,6 +2607,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -2598,6 +2648,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2607,6 +2658,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2616,6 +2668,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, @@ -2636,6 +2689,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -2688,6 +2742,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2718,6 +2773,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -2761,6 +2817,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -2779,6 +2836,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2788,6 +2846,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -2807,6 +2866,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -2816,6 +2876,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -2856,6 +2917,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2865,6 +2927,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2874,6 +2937,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, @@ -2894,6 +2958,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3079,6 +3144,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_tpid", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3088,6 +3154,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3104,6 +3171,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_pcp", .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3121,6 +3189,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3151,6 +3220,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3187,6 +3257,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3245,6 +3316,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3254,6 +3326,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3270,6 +3343,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3300,6 +3374,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "drop", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3330,6 +3405,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3360,6 +3436,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3466,6 +3543,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3475,6 +3553,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3491,6 +3570,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3521,6 +3601,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "drop", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3623,6 +3704,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3653,6 +3735,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3759,6 +3842,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3768,6 +3852,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3784,6 +3869,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3793,6 +3879,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "pop_vlan", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3822,6 +3909,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "drop", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -3890,6 +3978,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_tpid", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3899,6 +3988,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3915,6 +4005,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vtag_pcp", .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3940,6 +4031,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv4_addr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -3950,13 +4042,14 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv4_addr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { (BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST >> 8) & 0xff, BNXT_ULP_ACT_PROP_IDX_SET_IPV4_DST & 0xff} }, - /* act_tid: 5, wh_plus, table: int_encap_mac_record.0 */ + /* act_tid: 5, wh_plus, table: int_encap_mac_record.dummy */ { .description = "ecv_tun_type", .field_bit_size = 3, @@ -4049,6 +4142,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4079,6 +4173,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -4115,6 +4210,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -4124,6 +4220,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4133,6 +4230,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -4152,6 +4250,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4161,6 +4260,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -4201,6 +4301,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4210,6 +4311,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4219,6 +4321,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, @@ -4239,6 +4342,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4291,6 +4395,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4321,6 +4426,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -4364,6 +4470,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -4382,6 +4489,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "dst_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4391,6 +4499,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_dst_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_DST >> 56) & 0xff, @@ -4410,6 +4519,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "src_ip_ptr", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4419,6 +4529,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tcp_src_port", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_ACT_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_ACT_BIT_SET_TP_SRC >> 56) & 0xff, @@ -4459,6 +4570,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "l3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4468,6 +4580,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "tl3_ttl_dec", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4477,6 +4590,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "decap_func", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_T_VXLAN >> 56) & 0xff, @@ -4497,6 +4611,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4629,6 +4744,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4638,6 +4754,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv4_src_addr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4655,6 +4772,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4664,6 +4782,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ipv6_src_addr", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4699,6 +4818,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ecv_l3_type", .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4717,6 +4837,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ecv_vtag_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4742,6 +4863,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_l2_dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4775,6 +4897,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_udp", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4797,6 +4920,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4827,6 +4951,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -4863,6 +4988,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4942,6 +5068,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -4994,6 +5121,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_ptr", .field_bit_size = 14, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -5024,6 +5152,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "flow_cntr_en", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_BIT, .field_opr1 = { @@ -5151,6 +5280,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -5206,6 +5336,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ecv_l3_type", .field_bit_size = 3, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -5224,6 +5355,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "ecv_vtag_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -5249,6 +5381,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_l2_dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -5282,6 +5415,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_udp", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { @@ -5291,6 +5425,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_act_result_field_list[] = { { .description = "encap_tun", .field_bit_size = 80, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ACT_PROP, .field_opr1 = { diff --git a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c index 85e4301bb3..a77b696b5c 100644 --- a/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c +++ b/drivers/net/bnxt/tf_ulp/ulp_template_db_wh_plus_class.c @@ -3,7 +3,7 @@ * All rights reserved. */ -/* date: Thu Dec 17 17:35:03 2020 */ +/* date: Tue Jan 26 15:51:49 2021 */ #include "ulp_template_db_enum.h" #include "ulp_template_db_field.h" @@ -29,7 +29,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 11, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 4, + .cond_start_idx = 5, .cond_nums = 0 } }, /* class_tid: 3, wh_plus, ingress */ @@ -39,7 +39,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 22, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 0 } }, /* class_tid: 4, wh_plus, egress */ @@ -49,7 +49,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 30, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 } }, /* class_tid: 5, wh_plus, egress */ @@ -59,7 +59,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 44, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 } }, /* class_tid: 6, wh_plus, egress */ @@ -69,7 +69,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 53, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 } }, /* class_tid: 7, wh_plus, egress */ @@ -79,7 +79,7 @@ struct bnxt_ulp_mapper_tmpl_info ulp_wh_plus_class_tmpl_list[] = { .start_tbl_idx = 62, .reject_info = { .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_FALSE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 } } }; @@ -276,9 +276,9 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .execute_info = { .cond_true_goto = 0, .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, .cond_start_idx = 4, - .cond_nums = 0 }, + .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, @@ -286,7 +286,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .key_start_idx = 116, .blob_key_bit_size = 448, .key_bit_size = 448, - .key_num_fields = 11, + .key_num_fields = 10, .result_start_idx = 61, .result_bit_size = 64, .result_num_fields = 9 @@ -300,13 +300,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 4, + .cond_start_idx = 5, .cond_nums = 0 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 127, + .key_start_idx = 126, .blob_key_bit_size = 416, .key_bit_size = 416, .key_num_fields = 11, @@ -318,18 +318,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .direction = TF_DIR_RX, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .execute_info = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 4, + .cond_start_idx = 5, .cond_nums = 0 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 138, + .key_start_idx = 137, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 11, @@ -347,12 +346,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 2, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 4, + .cond_start_idx = 5, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 149, + .key_start_idx = 148, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -367,7 +366,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 5, + .cond_start_idx = 6, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_SRCH_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -375,7 +374,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 150, + .key_start_idx = 149, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -395,12 +394,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 5, + .cond_start_idx = 6, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_FLOW_SIG_ID_MATCH, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 163, + .key_start_idx = 162, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -414,7 +413,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 4, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 5, + .cond_start_idx = 6, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -428,7 +427,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 2, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 6, + .cond_start_idx = 7, .cond_nums = 1 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, @@ -437,7 +436,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 166, + .key_start_idx = 165, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -455,7 +454,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 7, + .cond_start_idx = 8, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_PROFILE_TCAM_INDEX_0, @@ -464,7 +463,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 209, + .key_start_idx = 208, .blob_key_bit_size = 81, .key_bit_size = 81, .key_num_fields = 43, @@ -484,12 +483,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 7, + .cond_start_idx = 8, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 252, + .key_start_idx = 251, .blob_key_bit_size = 14, .key_bit_size = 14, .key_num_fields = 3, @@ -506,13 +505,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 7, + .cond_start_idx = 8, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 255, + .key_start_idx = 254, .blob_key_bit_size = 176, .key_bit_size = 176, .key_num_fields = 10, @@ -528,17 +527,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .execute_info = { .cond_true_goto = 0, .cond_false_goto = 1, - .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 8, - .cond_nums = 0 }, + .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, + .cond_start_idx = 9, + .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 265, + .key_start_idx = 264, .blob_key_bit_size = 448, .key_bit_size = 448, - .key_num_fields = 11, + .key_num_fields = 10, .result_start_idx = 149, .result_bit_size = 64, .result_num_fields = 9 @@ -552,13 +551,13 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 0 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 276, + .key_start_idx = 274, .blob_key_bit_size = 416, .key_bit_size = 416, .key_num_fields = 11, @@ -570,18 +569,17 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .resource_func = BNXT_ULP_RESOURCE_FUNC_EXT_EM_TABLE, .resource_type = TF_MEM_EXTERNAL, .direction = TF_DIR_TX, - .mem_type_opcode = BNXT_ULP_MEM_TYPE_OPC_EXECUTE_IF_EXT, .execute_info = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 0 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_PUSH_IF_MARK_ACTION, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_YES, - .key_start_idx = 287, + .key_start_idx = 285, .blob_key_bit_size = 448, .key_bit_size = 448, .key_num_fields = 11, @@ -599,7 +597,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -620,12 +618,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 298, + .key_start_idx = 296, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -639,7 +637,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 3, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 8, + .cond_start_idx = 10, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -653,7 +651,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -664,7 +662,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 299, + .key_start_idx = 297, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -684,12 +682,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 312, + .key_start_idx = 310, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -705,7 +703,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, @@ -723,7 +721,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, @@ -741,7 +739,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_PHY_PORT_PARIF, @@ -758,7 +756,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 6, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 9, + .cond_start_idx = 11, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_NOP @@ -773,7 +771,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 10, + .cond_start_idx = 12, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -795,12 +793,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 10, + .cond_start_idx = 12, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 313, + .key_start_idx = 311, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -814,7 +812,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 10, + .cond_start_idx = 12, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -828,7 +826,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 11, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -837,7 +835,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 314, + .key_start_idx = 312, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -857,12 +855,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 11, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 327, + .key_start_idx = 325, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -880,12 +878,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 11, + .cond_start_idx = 13, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 328, + .key_start_idx = 326, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -899,7 +897,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 3, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 11, + .cond_start_idx = 13, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -913,7 +911,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 12, + .cond_start_idx = 14, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -922,7 +920,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 329, + .key_start_idx = 327, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -942,12 +940,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_AND, - .cond_start_idx = 12, + .cond_start_idx = 14, .cond_nums = 2 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 342, + .key_start_idx = 340, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -965,7 +963,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -985,7 +983,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, @@ -1003,7 +1001,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, @@ -1021,7 +1019,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_COMP_FIELD, .tbl_operand = BNXT_ULP_CF_IDX_DRV_FUNC_PARIF, @@ -1041,12 +1039,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 343, + .key_start_idx = 341, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1060,7 +1058,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 3, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 14, + .cond_start_idx = 16, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -1074,7 +1072,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -1083,7 +1081,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 344, + .key_start_idx = 342, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1103,12 +1101,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 357, + .key_start_idx = 355, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1126,7 +1124,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_ENCAP_PTR_0, @@ -1148,7 +1146,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -1169,7 +1167,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -1188,7 +1186,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -1198,7 +1196,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 358, + .key_start_idx = 356, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1216,7 +1214,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -1226,7 +1224,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 371, + .key_start_idx = 369, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1246,12 +1244,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_READ, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 384, + .key_start_idx = 382, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1265,7 +1263,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 3, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_OR, - .cond_start_idx = 15, + .cond_start_idx = 17, .cond_nums = 1 }, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_ALLOC_RID_REGFILE, @@ -1279,7 +1277,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -1288,7 +1286,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .fdb_operand = BNXT_ULP_RF_IDX_RID, .pri_opcode = BNXT_ULP_PRI_OPC_CONST, .pri_operand = 0, - .key_start_idx = 385, + .key_start_idx = 383, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1308,12 +1306,12 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_GENERIC_TBL_OPC_WRITE, .accept_opcode = BNXT_ULP_ACCEPT_OPC_ALWAYS, .fdb_opcode = BNXT_ULP_FDB_OPC_PUSH_FID, - .key_start_idx = 398, + .key_start_idx = 396, .blob_key_bit_size = 8, .key_bit_size = 8, .key_num_fields = 1, @@ -1329,7 +1327,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, .tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF, @@ -1347,7 +1345,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, .tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF, @@ -1365,7 +1363,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_IF_TBL_OPC_WR_CONST, .tbl_operand = ULP_WP_SYM_LOOPBACK_PARIF, @@ -1385,7 +1383,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 1, .cond_false_goto = 1, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_MAIN_ACTION_PTR, @@ -1405,7 +1403,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_TCAM_TBL_OPC_ALLOC_WR_REGFILE, .tbl_operand = BNXT_ULP_RF_IDX_L2_CNTXT_TCAM_INDEX_0, @@ -1415,7 +1413,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .pri_operand = 0, .mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP, .critical_resource = BNXT_ULP_CRITICAL_RESOURCE_NO, - .key_start_idx = 399, + .key_start_idx = 397, .blob_key_bit_size = 167, .key_bit_size = 167, .key_num_fields = 13, @@ -1435,7 +1433,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = { .cond_true_goto = 0, .cond_false_goto = 0, .cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE, - .cond_start_idx = 16, + .cond_start_idx = 18, .cond_nums = 0 }, .tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE, .tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR, @@ -1470,6 +1468,11 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET, .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 }, + /* cond_execute: class_tid: 1, eem.ipv4 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + }, /* cond_execute: class_tid: 2, l2_cntxt_tcam_cache.rd */ { .cond_opcode = BNXT_ULP_COND_OPC_FIELD_BIT_NOT_SET, @@ -1490,6 +1493,11 @@ struct bnxt_ulp_mapper_cond_info ulp_wh_plus_class_cond_list[] = { .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET, .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 }, + /* cond_execute: class_tid: 2, eem.ipv4 */ + { + .cond_opcode = BNXT_ULP_COND_OPC_HDR_BIT_IS_SET, + .cond_operand = BNXT_ULP_HDR_BIT_O_IPV4 + }, /* cond_execute: class_tid: 3, control.0 */ { .cond_opcode = BNXT_ULP_COND_OPC_RF_NOT_SET, @@ -1537,6 +1545,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1546,6 +1555,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1558,6 +1568,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l2_ivlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1567,6 +1578,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_ivlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1594,6 +1606,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "mac0_addr", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1603,6 +1616,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "mac0_addr", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1614,6 +1628,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1623,6 +1638,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -1707,6 +1723,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_num_vtags", .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1816,6 +1833,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, @@ -1843,6 +1861,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "hdr_sig_id", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1871,6 +1890,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_CF, .field_cond_opr = { (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff, @@ -1881,6 +1901,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -1903,6 +1924,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_error", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1921,6 +1943,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -1930,6 +1953,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2072,6 +2096,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2510,6 +2535,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, @@ -2633,6 +2659,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_CF, .field_cond_opr = { (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff, @@ -2643,6 +2670,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -2665,6 +2693,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_error", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2683,6 +2712,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2692,6 +2722,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -2836,6 +2867,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3274,6 +3306,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, @@ -3408,6 +3441,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_DMAC >> 8) & 0xff, @@ -3435,6 +3469,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "hdr_sig_id", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -3480,15 +3515,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -3514,15 +3563,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -3563,6 +3626,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv4.dst", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3572,6 +3636,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv4.dst", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3583,6 +3648,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv4.src", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3592,6 +3658,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv4.src", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3603,6 +3670,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3612,6 +3680,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3633,6 +3702,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3653,6 +3723,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3664,14 +3735,14 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { { .field_info_mask = { .description = "spare", - .field_bit_size = 35, + .field_bit_size = 275, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "spare", - .field_bit_size = 35, + .field_bit_size = 275, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO @@ -3698,15 +3769,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -3732,15 +3817,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -3763,14 +3862,14 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, { .field_info_mask = { - .description = "o_ipv6.ip_proto", + .description = "o_ipv4.ip_proto", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "o_ipv6.ip_proto", + .description = "o_ipv4.ip_proto", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, @@ -3779,48 +3878,53 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, { .field_info_mask = { - .description = "o_ipv6.dst", - .field_bit_size = 128, + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff} }, .field_info_spec = { - .description = "o_ipv6.dst", - .field_bit_size = 128, + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff} } }, { .field_info_mask = { - .description = "o_ipv6.src", - .field_bit_size = 128, + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff} }, .field_info_spec = { - .description = "o_ipv6.src", - .field_bit_size = 128, + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff} } }, { .field_info_mask = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3830,6 +3934,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -3838,22 +3943,6 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { } }, { - .field_info_mask = { - .description = "o_eth.dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - .field_info_spec = { - .description = "o_eth.dmac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - } - }, - { .field_info_mask = { .description = "l2_cntxt_id", .field_bit_size = 10, @@ -3867,6 +3956,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3887,6 +3977,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -3932,15 +4023,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -3966,15 +4071,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -4015,6 +4134,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4024,6 +4144,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4035,6 +4156,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4044,6 +4166,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4055,6 +4178,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4064,6 +4188,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4101,6 +4226,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4121,6 +4247,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4166,15 +4293,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -4200,15 +4341,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -4249,6 +4404,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4258,6 +4414,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4269,6 +4426,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4278,6 +4436,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4289,6 +4448,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4298,6 +4458,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.smac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4335,6 +4496,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4355,6 +4517,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -4367,6 +4530,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4376,6 +4540,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4388,6 +4553,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l2_ivlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4397,6 +4563,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_ivlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4424,6 +4591,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "mac0_addr", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4433,6 +4601,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "mac0_addr", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4444,6 +4613,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4453,6 +4623,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -4537,6 +4708,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_num_vtags", .field_bit_size = 2, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4646,6 +4818,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, @@ -4673,6 +4846,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "hdr_sig_id", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4701,6 +4875,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_CF, .field_cond_opr = { (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff, @@ -4711,6 +4886,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -4733,6 +4909,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_error", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4751,6 +4928,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4760,6 +4938,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -4902,6 +5081,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -5340,6 +5520,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, @@ -5463,6 +5644,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_CF, .field_cond_opr = { (BNXT_ULP_CF_IDX_O_L4 >> 8) & 0xff, @@ -5473,6 +5655,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_type", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -5495,6 +5678,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_error", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -5513,6 +5697,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -5522,6 +5707,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l4_hdr_valid", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -5666,6 +5852,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_vtag_present", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -6104,6 +6291,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, @@ -6238,6 +6426,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_FIELD_BIT, .field_cond_opr = { (BNXT_ULP_GLB_HF_ID_O_ETH_SMAC >> 8) & 0xff, @@ -6265,6 +6454,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "hdr_sig_id", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -6310,15 +6500,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6344,15 +6548,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6393,6 +6611,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv4.dst", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6402,6 +6621,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv4.dst", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6413,6 +6633,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv4.src", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6422,6 +6643,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv4.src", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6433,6 +6655,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6442,6 +6665,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6463,6 +6687,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6483,6 +6708,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6494,14 +6720,14 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { { .field_info_mask = { .description = "spare", - .field_bit_size = 35, + .field_bit_size = 275, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { .description = "spare", - .field_bit_size = 35, + .field_bit_size = 275, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO @@ -6528,15 +6754,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6562,15 +6802,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6593,14 +6847,14 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, { .field_info_mask = { - .description = "o_ipv6.ip_proto", + .description = "o_ipv4.ip_proto", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, .field_info_spec = { - .description = "o_ipv6.ip_proto", + .description = "o_ipv4.ip_proto", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, @@ -6609,64 +6863,53 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { }, { .field_info_mask = { - .description = "o_ipv6.dst", - .field_bit_size = 128, + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff} }, .field_info_spec = { - .description = "o_ipv6.dst", - .field_bit_size = 128, + .description = "o_ipv4.dst", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_DST_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_DST_ADDR & 0xff} } }, { .field_info_mask = { - .description = "o_ipv6.src", - .field_bit_size = 128, + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} + (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff} }, .field_info_spec = { - .description = "o_ipv6.src", - .field_bit_size = 128, + .description = "o_ipv4.src", + .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - (BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR >> 8) & 0xff, - BNXT_ULP_GLB_HF_ID_O_IPV6_SRC_ADDR & 0xff} - } - }, - { - .field_info_mask = { - .description = "o_eth.smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO - }, - .field_info_spec = { - .description = "o_eth.smac", - .field_bit_size = 48, - .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_ZERO + (BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_IPV4_SRC_ADDR & 0xff} } }, { .field_info_mask = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6676,6 +6919,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6697,6 +6941,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6717,6 +6962,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6762,15 +7008,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6796,15 +7056,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -6845,6 +7119,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6854,6 +7129,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6865,6 +7141,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6874,6 +7151,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6901,6 +7179,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6910,6 +7189,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -6931,6 +7211,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6951,6 +7232,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -6996,15 +7278,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.dport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_DST_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_DST_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.dport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -7030,15 +7326,29 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .description = "o_l4.sport", .field_bit_size = 16, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, - .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, + .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, + .field_cond_opr = { + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 48) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 40) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 32) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 24) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 16) & 0xff, + ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 8) & 0xff, + (uint64_t)BNXT_ULP_HDR_BIT_O_TCP & 0xff}, + .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { - 0xff, - 0xff} + (BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_TCP_SRC_PORT & 0xff}, + .field_src2 = BNXT_ULP_FIELD_SRC_HF, + .field_opr2 = { + (BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT >> 8) & 0xff, + BNXT_ULP_GLB_HF_ID_O_UDP_SRC_PORT & 0xff} }, .field_info_spec = { .description = "o_l4.sport", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_HDR_BIT, .field_cond_opr = { ((uint64_t)BNXT_ULP_HDR_BIT_O_TCP >> 56) & 0xff, @@ -7079,6 +7389,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7088,6 +7399,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.dst", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7099,6 +7411,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7108,6 +7421,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_ipv6.src", .field_bit_size = 128, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7135,6 +7449,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_mask = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7144,6 +7459,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "o_eth.dmac", .field_bit_size = 48, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_HF, .field_opr1 = { @@ -7165,6 +7481,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -7185,6 +7502,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -7206,6 +7524,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7275,6 +7594,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7446,6 +7766,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7467,6 +7788,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7536,6 +7858,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7707,6 +8030,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7728,6 +8052,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7797,6 +8122,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7968,6 +8294,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -7989,6 +8316,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8058,6 +8386,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8229,6 +8558,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8267,6 +8597,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_ovlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8303,6 +8634,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8483,6 +8815,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "l2_ivlan_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8535,6 +8868,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8714,6 +9048,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8783,6 +9118,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -8954,6 +9290,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9023,6 +9360,7 @@ struct bnxt_ulp_mapper_key_info ulp_wh_plus_class_key_info_list[] = { .field_info_spec = { .description = "svif", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9187,6 +9525,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9196,6 +9535,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -9212,6 +9552,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9317,6 +9658,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.1", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9326,6 +9668,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.2", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9335,6 +9678,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.3", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9351,6 +9695,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.5", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9360,6 +9705,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.6", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9399,6 +9745,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9462,6 +9809,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.2", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9471,6 +9819,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.3", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9480,6 +9829,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.4", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -9496,6 +9846,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.6", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9505,6 +9856,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.7", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9537,6 +9889,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9563,6 +9916,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9572,6 +9926,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "profile_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9581,6 +9936,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9588,7 +9944,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, { - .description = "wm_profile_id", + .description = "wc_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, @@ -9597,6 +9953,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "flow_sig_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -9607,6 +9964,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9677,6 +10035,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9695,13 +10054,12 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_WP_SYM_EEM_ACT_REC_INT} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9715,8 +10073,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (413 >> 8) & 0xff, - 413 & 0xff} + (173 >> 8) & 0xff, + 173 & 0xff} }, { .description = "reserved", @@ -9754,6 +10112,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9824,6 +10183,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9842,13 +10202,12 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_WP_SYM_EEM_ACT_REC_INT} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9901,6 +10260,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -9910,6 +10270,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -9926,6 +10287,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_CF, .field_cond_opr = { (BNXT_ULP_CF_IDX_MATCH_PORT_IS_VFREP >> 8) & 0xff, @@ -9976,6 +10338,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "sp_rec_ptr", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10039,6 +10402,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.1", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10048,6 +10412,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.2", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10057,6 +10422,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.3", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10073,6 +10439,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.5", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10082,6 +10449,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.6", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10121,6 +10489,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10177,6 +10546,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.1", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10193,6 +10563,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.3", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10202,6 +10573,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.4", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_FIELD_BIT, .field_opr1 = { @@ -10218,6 +10590,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.6", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10227,6 +10600,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_key_mask.7", .field_bit_size = 1, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10259,6 +10633,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10285,6 +10660,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10294,6 +10670,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "profile_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10303,6 +10680,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "em_profile_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10310,7 +10688,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { BNXT_ULP_RF_IDX_EM_PROFILE_ID_0 & 0xff} }, { - .description = "wm_profile_id", + .description = "wc_profile_id", .field_bit_size = 8, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, @@ -10319,6 +10697,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "flow_sig_id", .field_bit_size = 8, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10329,6 +10708,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10399,6 +10779,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10417,13 +10798,12 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_WP_SYM_EEM_ACT_REC_INT} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10437,8 +10817,8 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, .field_opr1 = { - (413 >> 8) & 0xff, - 413 & 0xff} + (173 >> 8) & 0xff, + 173 & 0xff} }, { .description = "reserved", @@ -10476,6 +10856,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10546,6 +10927,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 33, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10564,13 +10946,12 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { .field_bit_size = 1, .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, - .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = { - ULP_WP_SYM_EEM_ACT_REC_INT} + .field_src1 = BNXT_ULP_FIELD_SRC_ZERO }, { .description = "act_rec_size", .field_bit_size = 5, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10756,6 +11137,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10808,6 +11190,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10817,6 +11200,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -10833,6 +11217,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -10908,6 +11293,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10917,6 +11303,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10926,6 +11313,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10943,6 +11331,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10953,6 +11342,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -10963,6 +11353,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11106,6 +11497,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -11181,6 +11573,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -11258,6 +11651,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11267,6 +11661,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11291,6 +11686,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11300,6 +11696,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -11316,6 +11713,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -11391,6 +11789,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11400,6 +11799,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11409,6 +11809,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11559,6 +11960,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -11611,6 +12013,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11621,6 +12024,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11631,6 +12035,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11739,6 +12144,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11748,6 +12154,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -11835,6 +12242,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vtag_vid", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -11922,6 +12330,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "encap_ptr", .field_bit_size = 11, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12187,6 +12596,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -12241,6 +12651,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_record_ptr", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12339,6 +12750,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_record_ptr", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12437,6 +12849,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12446,6 +12859,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "prof_func_id", .field_bit_size = 7, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -12462,9 +12876,11 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "parif", .field_bit_size = 4, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CONST, - .field_opr1 = {ULP_WP_SYM_LOOPBACK_PARIF & 0xff} + .field_opr1 = { + ULP_WP_SYM_LOOPBACK_PARIF} }, { .description = "allowed_pri", @@ -12535,6 +12951,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "rid", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12544,6 +12961,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_tcam_index", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12553,6 +12971,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "l2_cntxt_id", .field_bit_size = 10, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = { @@ -12570,6 +12989,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -12580,6 +13000,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -12590,6 +13011,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_rec_ptr", .field_bit_size = 32, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_GLB_RF, .field_opr1 = { @@ -12733,6 +13155,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "vnic_or_vport", .field_bit_size = 12, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_CF, .field_opr1 = { @@ -12785,6 +13208,7 @@ struct bnxt_ulp_mapper_field_info ulp_wh_plus_class_result_field_list[] = { { .description = "act_record_ptr", .field_bit_size = 16, + .field_opc = BNXT_ULP_FIELD_OPC_COND_OP, .field_cond_src = BNXT_ULP_FIELD_COND_SRC_TRUE, .field_src1 = BNXT_ULP_FIELD_SRC_RF, .field_opr1 = {