net/octeontx2: connect flow API to ethdev ops
Connect rte_flow driver ops to ethdev via .filter_ctrl op. Signed-off-by: Vivek Sharma <viveksharma@marvell.com> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
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@ -22,6 +22,7 @@ RSS key update = Y
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RSS reta update = Y
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Inner RSS = Y
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Flow control = Y
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Flow API = Y
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Packet type parsing = Y
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Timesync = Y
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Timestamp offload = Y
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@ -22,6 +22,7 @@ RSS key update = Y
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RSS reta update = Y
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Inner RSS = Y
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Flow control = Y
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Flow API = Y
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Packet type parsing = Y
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Rx descriptor status = Y
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Basic stats = Y
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@ -17,6 +17,7 @@ RSS hash = Y
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RSS key update = Y
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RSS reta update = Y
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Inner RSS = Y
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Flow API = Y
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Packet type parsing = Y
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Rx descriptor status = Y
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Basic stats = Y
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@ -23,6 +23,7 @@ Features of the OCTEON TX2 Ethdev PMD are:
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- Multiple queues for TX and RX
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- Receiver Side Scaling (RSS)
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- MAC filtering
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- Generic flow API
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- Port hardware statistics
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- Link state information
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- Link flow control
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@ -109,3 +110,99 @@ Runtime Config Options
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Above devarg parameters are configurable per device, user needs to pass the
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parameters to all the PCIe devices if application requires to configure on
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all the ethdev ports.
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RTE Flow Support
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----------------
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The OCTEON TX2 SoC family NIC has support for the following patterns and
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actions.
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Patterns:
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.. _table_octeontx2_supported_flow_item_types:
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.. table:: Item types
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+----+--------------------------------+
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| # | Pattern Type |
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+====+================================+
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| 1 | RTE_FLOW_ITEM_TYPE_ETH |
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+----+--------------------------------+
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| 2 | RTE_FLOW_ITEM_TYPE_VLAN |
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+----+--------------------------------+
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| 3 | RTE_FLOW_ITEM_TYPE_E_TAG |
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+----+--------------------------------+
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| 4 | RTE_FLOW_ITEM_TYPE_IPV4 |
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+----+--------------------------------+
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| 5 | RTE_FLOW_ITEM_TYPE_IPV6 |
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+----+--------------------------------+
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| 6 | RTE_FLOW_ITEM_TYPE_ARP_ETH_IPV4|
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+----+--------------------------------+
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| 7 | RTE_FLOW_ITEM_TYPE_MPLS |
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+----+--------------------------------+
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| 8 | RTE_FLOW_ITEM_TYPE_ICMP |
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+----+--------------------------------+
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| 9 | RTE_FLOW_ITEM_TYPE_UDP |
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+----+--------------------------------+
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| 10 | RTE_FLOW_ITEM_TYPE_TCP |
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+----+--------------------------------+
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| 11 | RTE_FLOW_ITEM_TYPE_SCTP |
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+----+--------------------------------+
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| 12 | RTE_FLOW_ITEM_TYPE_ESP |
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+----+--------------------------------+
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| 13 | RTE_FLOW_ITEM_TYPE_GRE |
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+----+--------------------------------+
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| 14 | RTE_FLOW_ITEM_TYPE_NVGRE |
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+----+--------------------------------+
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| 15 | RTE_FLOW_ITEM_TYPE_VXLAN |
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+----+--------------------------------+
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| 16 | RTE_FLOW_ITEM_TYPE_GTPC |
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+----+--------------------------------+
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| 17 | RTE_FLOW_ITEM_TYPE_GTPU |
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+----+--------------------------------+
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| 18 | RTE_FLOW_ITEM_TYPE_GENEVE |
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+----+--------------------------------+
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| 19 | RTE_FLOW_ITEM_TYPE_VXLAN_GPE |
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+----+--------------------------------+
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| 20 | RTE_FLOW_ITEM_TYPE_VOID |
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+----+--------------------------------+
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| 21 | RTE_FLOW_ITEM_TYPE_ANY |
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+----+--------------------------------+
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Actions:
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.. _table_octeontx2_supported_ingress_action_types:
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.. table:: Ingress action types
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+----+--------------------------------+
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| # | Action Type |
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+====+================================+
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| 1 | RTE_FLOW_ACTION_TYPE_VOID |
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+----+--------------------------------+
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| 2 | RTE_FLOW_ACTION_TYPE_MARK |
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+----+--------------------------------+
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| 3 | RTE_FLOW_ACTION_TYPE_FLAG |
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+----+--------------------------------+
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| 4 | RTE_FLOW_ACTION_TYPE_COUNT |
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+----+--------------------------------+
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| 5 | RTE_FLOW_ACTION_TYPE_DROP |
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+----+--------------------------------+
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| 6 | RTE_FLOW_ACTION_TYPE_QUEUE |
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+----+--------------------------------+
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| 7 | RTE_FLOW_ACTION_TYPE_RSS |
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+----+--------------------------------+
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| 8 | RTE_FLOW_ACTION_TYPE_SECURITY |
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+----+--------------------------------+
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.. _table_octeontx2_supported_egress_action_types:
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.. table:: Egress action types
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+----+--------------------------------+
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| # | Action Type |
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+====+================================+
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| 1 | RTE_FLOW_ACTION_TYPE_COUNT |
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+----+--------------------------------+
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| 2 | RTE_FLOW_ACTION_TYPE_DROP |
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+----+--------------------------------+
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@ -1345,6 +1345,7 @@ static const struct eth_dev_ops otx2_eth_dev_ops = {
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.rx_descriptor_status = otx2_nix_rx_descriptor_status,
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.tx_done_cleanup = otx2_nix_tx_done_cleanup,
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.pool_ops_supported = otx2_nix_pool_ops_supported,
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.filter_ctrl = otx2_nix_dev_filter_ctrl,
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.get_module_info = otx2_nix_get_module_info,
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.get_module_eeprom = otx2_nix_get_module_eeprom,
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.flow_ctrl_get = otx2_nix_flow_ctrl_get,
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@ -1524,6 +1525,11 @@ otx2_eth_dev_init(struct rte_eth_dev *eth_dev)
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dev->hwcap |= OTX2_FIXUP_F_LIMIT_CQ_FULL;
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}
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/* Initialize rte-flow */
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rc = otx2_flow_init(dev);
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if (rc)
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goto free_mac_addrs;
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otx2_nix_dbg("Port=%d pf=%d vf=%d ver=%s msix_off=%d hwcap=0x%" PRIx64
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" rxoffload_capa=0x%" PRIx64 " txoffload_capa=0x%" PRIx64,
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eth_dev->data->port_id, dev->pf, dev->vf,
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@ -1560,6 +1566,9 @@ otx2_eth_dev_uninit(struct rte_eth_dev *eth_dev, bool mbox_close)
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/* Disable nix bpid config */
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otx2_nix_rxchan_bpid_cfg(eth_dev, false);
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/* Disable other rte_flow entries */
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otx2_flow_fini(dev);
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/* Disable PTP if already enabled */
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if (otx2_ethdev_is_ptp_en(dev))
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otx2_nix_timesync_disable(eth_dev);
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@ -294,6 +294,9 @@ otx2_eth_pmd_priv(struct rte_eth_dev *eth_dev)
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/* Ops */
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void otx2_nix_info_get(struct rte_eth_dev *eth_dev,
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struct rte_eth_dev_info *dev_info);
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int otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
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enum rte_filter_type filter_type,
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enum rte_filter_op filter_op, void *arg);
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int otx2_nix_get_module_info(struct rte_eth_dev *eth_dev,
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struct rte_eth_dev_module_info *modinfo);
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int otx2_nix_get_module_eeprom(struct rte_eth_dev *eth_dev,
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@ -220,6 +220,27 @@ otx2_nix_pool_ops_supported(struct rte_eth_dev *eth_dev, const char *pool)
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return -ENOTSUP;
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}
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int
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otx2_nix_dev_filter_ctrl(struct rte_eth_dev *eth_dev,
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enum rte_filter_type filter_type,
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enum rte_filter_op filter_op, void *arg)
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{
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RTE_SET_USED(eth_dev);
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if (filter_type != RTE_ETH_FILTER_GENERIC) {
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otx2_err("Unsupported filter type %d", filter_type);
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return -ENOTSUP;
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}
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if (filter_op == RTE_ETH_FILTER_GET) {
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*(const void **)arg = &otx2_flow_ops;
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return 0;
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}
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otx2_err("Invalid filter_op %d", filter_op);
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return -EINVAL;
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}
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static struct cgx_fw_data *
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nix_get_fwdata(struct otx2_eth_dev *dev)
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{
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