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net/bnxt: add flow templates for Thor

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1. Add support for egress flows with port and count action for
   Thor platform.
2. Added templates to support VXLAN encapsulation feature for Thor.
3. Added support for VXLAN decap and VLAN pop actions along with
   the ingress flow.
4. Added templates to enable VXLAN decap support for f1 and f2 flows.
5. Added templates Thor VF Rep support
6. Added Thor ingress mod table actions for NAT, NAPT, and TTL.
7. Added mirror/sample table support
8. Added supported for IPv6 flows for Thor.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Shahaji Bhosle <sbhosle@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
This commit is contained in:
Kishore Padmanabha 2021-09-20 13:12:10 +05:30 committed by Ajit Khaparde
parent 1f7f7c3c73
commit 2730e7f9e8
10 changed files with 41805 additions and 1232 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
drivers/net/bnxt/tf_core/tf_tcam.c
View File

@ -323,8 +323,12 @@ tf_tcam_alloc(struct tf *tfp,
}
/* return the start index of each row */
if (i == 0)
if (parms->priority == 0) {
if (i == 0)
parms->idx = index;
} else {
parms->idx = index;
}
}
return 0;

123
drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_enum.h
View File

@ -3,12 +3,12 @@
* All rights reserved.
*/
/* date: Thu May 27 17:35:19 2021 */
/* date: Tue Jul 13 12:36:40 2021 */
#ifndef ULP_TEMPLATE_DB_H_
#define ULP_TEMPLATE_DB_H_
#define BNXT_ULP_REGFILE_MAX_SZ 40
#define BNXT_ULP_REGFILE_MAX_SZ 42
#define BNXT_ULP_MAX_NUM_DEVICES 4
#define BNXT_ULP_LOG2_MAX_NUM_DEV 2
#define BNXT_ULP_GEN_TBL_MAX_SZ 12
@ -27,9 +27,9 @@
#define BNXT_ULP_ACT_HID_SHFTL 26
#define BNXT_ULP_ACT_HID_MASK 2047
#define BNXT_ULP_APP_RESOURCE_RESV_LIST_MAX_SZ 8
#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 43
#define BNXT_ULP_GLB_RESOURCE_TBL_MAX_SZ 62
#define BNXT_ULP_APP_GLB_RESOURCE_TBL_MAX_SZ 50
#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 204
#define BNXT_ULP_RESOURCE_RESV_LIST_MAX_SZ 206
#define BNXT_ULP_APP_CAP_TBL_MAX_SZ 6
#define BNXT_ULP_COND_GOTO_REJECT 1023
#define BNXT_ULP_COND_GOTO_RF 0x10000
@ -44,23 +44,23 @@
#define ULP_WH_PLUS_CLASS_RESULT_FIELD_LIST_SIZE 618
#define ULP_WH_PLUS_CLASS_COND_LIST_SIZE 49
#define ULP_THOR_CLASS_TMPL_LIST_SIZE 6
#define ULP_THOR_CLASS_TBL_LIST_SIZE 33
#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 242
#define ULP_THOR_CLASS_IDENT_LIST_SIZE 8
#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 259
#define ULP_THOR_CLASS_COND_LIST_SIZE 13
#define ULP_THOR_CLASS_TBL_LIST_SIZE 114
#define ULP_THOR_CLASS_KEY_INFO_LIST_SIZE 2305
#define ULP_THOR_CLASS_IDENT_LIST_SIZE 39
#define ULP_THOR_CLASS_RESULT_FIELD_LIST_SIZE 1192
#define ULP_THOR_CLASS_COND_LIST_SIZE 55
#define ULP_WH_PLUS_ACT_TMPL_LIST_SIZE 7
#define ULP_WH_PLUS_ACT_TBL_LIST_SIZE 35
#define ULP_WH_PLUS_ACT_KEY_INFO_LIST_SIZE 2
#define ULP_WH_PLUS_ACT_IDENT_LIST_SIZE 1
#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 527
#define ULP_WH_PLUS_ACT_RESULT_FIELD_LIST_SIZE 536
#define ULP_WH_PLUS_ACT_COND_LIST_SIZE 39
#define ULP_THOR_ACT_TMPL_LIST_SIZE 7
#define ULP_THOR_ACT_TBL_LIST_SIZE 2
#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 0
#define ULP_THOR_ACT_IDENT_LIST_SIZE 0
#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 18
#define ULP_THOR_ACT_COND_LIST_SIZE 5
#define ULP_THOR_ACT_TBL_LIST_SIZE 28
#define ULP_THOR_ACT_KEY_INFO_LIST_SIZE 2
#define ULP_THOR_ACT_IDENT_LIST_SIZE 1
#define ULP_THOR_ACT_RESULT_FIELD_LIST_SIZE 479
#define ULP_THOR_ACT_COND_LIST_SIZE 20
enum bnxt_ulp_act_bit {
BNXT_ULP_ACT_BIT_MARK = 0x0000000000000001,
@ -203,7 +203,11 @@ enum bnxt_ulp_cf_idx {
BNXT_ULP_CF_IDX_TUNNEL_ID = 63,
BNXT_ULP_CF_IDX_TUN_OFF_DIP_ID = 64,
BNXT_ULP_CF_IDX_TUN_OFF_DMAC_ID = 65,
BNXT_ULP_CF_IDX_LAST = 66
BNXT_ULP_CF_IDX_OO_VLAN_FB_VID = 66,
BNXT_ULP_CF_IDX_OI_VLAN_FB_VID = 67,
BNXT_ULP_CF_IDX_IO_VLAN_FB_VID = 68,
BNXT_ULP_CF_IDX_II_VLAN_FB_VID = 69,
BNXT_ULP_CF_IDX_LAST = 70
};
enum bnxt_ulp_cond_list_opc {
@ -386,29 +390,42 @@ enum bnxt_ulp_glb_rf_idx {
BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR = 5,
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0 = 6,
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1 = 7,
BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 8,
BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 9,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 = 10,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 = 11,
BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 12,
BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 13,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 14,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 15,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 16,
BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 17,
BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 18,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 19,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 20,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 21,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 22,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 23,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 24,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 25,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 26,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 27,
BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 28,
BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 29,
BNXT_ULP_GLB_RF_IDX_LAST = 30
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2 = 8,
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3 = 9,
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4 = 10,
BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5 = 11,
BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_0 = 12,
BNXT_ULP_GLB_RF_IDX_GLB_EM_PROFILE_ID_1 = 13,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0 = 14,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1 = 15,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2 = 16,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3 = 17,
BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4 = 18,
BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_0 = 19,
BNXT_ULP_GLB_RF_IDX_GLB_EM_KEY_ID_1 = 20,
BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0 = 21,
BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_1 = 22,
BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0 = 23,
BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0 = 24,
BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0 = 25,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_0 = 26,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_1 = 27,
BNXT_ULP_GLB_RF_IDX_APP_GLB_PROF_FUNC_ID_2 = 28,
BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_0 = 29,
BNXT_ULP_GLB_RF_IDX_APP_GLB_L2_CNTXT_ID_1 = 30,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_0 = 31,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_PROFILE_ID_1 = 32,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_0 = 33,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_1 = 34,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_PROFILE_ID_2 = 35,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_0 = 36,
BNXT_ULP_GLB_RF_IDX_APP_GLB_EM_KEY_ID_1 = 37,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_0 = 38,
BNXT_ULP_GLB_RF_IDX_APP_GLB_WC_KEY_ID_1 = 39,
BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_0 = 40,
BNXT_ULP_GLB_RF_IDX_APP_GLB_AREC_PTR_1 = 41,
BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID = 42,
BNXT_ULP_GLB_RF_IDX_LAST = 43
};
enum bnxt_ulp_hdr_type {
@ -520,7 +537,9 @@ enum bnxt_ulp_rf_idx {
BNXT_ULP_RF_IDX_CC = 37,
BNXT_ULP_RF_IDX_CF_FLOW_SIG_ID = 38,
BNXT_ULP_RF_IDX_PHY_PORT = 39,
BNXT_ULP_RF_IDX_LAST = 40
BNXT_ULP_RF_IDX_METADATA_PROF = 40,
BNXT_ULP_RF_IDX_MODIFY_PTR = 41,
BNXT_ULP_RF_IDX_LAST = 42
};
enum bnxt_ulp_shared_session {
@ -693,6 +712,13 @@ enum bnxt_ulp_act_prop_idx {
};
enum ulp_wp_sym {
ULP_WP_SYM_METADATA_OP_NORMAL = 0,
ULP_WP_SYM_METADATA_OP_L2_HASH = 0,
ULP_WP_SYM_METADATA_OP_L4_HASH = 0,
ULP_WP_SYM_FWD_OP_BYPASS_CFA = 0,
ULP_WP_SYM_FWD_OP_BYPASS_CFA_ROCE = 0,
ULP_WP_SYM_FWD_OP_BYPASS_LKUP = 0,
ULP_WP_SYM_FWD_OP_NORMAL_FLOW = 0,
ULP_WP_SYM_CTXT_OPCODE_BYPASS_CFA = 0,
ULP_WP_SYM_CTXT_OPCODE_BYPASS_LKUP = 0,
ULP_WP_SYM_CTXT_OPCODE_META_UPDATE = 0,
@ -843,6 +869,10 @@ enum ulp_wp_sym {
ULP_WP_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
ULP_WP_SYM_POP_VLAN_NO = 0,
ULP_WP_SYM_POP_VLAN_YES = 1,
ULP_WP_SYM_VLAN_DEL_RPT_DISABLED = 0,
ULP_WP_SYM_VLAN_DEL_RPT_STRIP_OUTER = 0,
ULP_WP_SYM_VLAN_DEL_RPT_STRIP_BOTH = 0,
ULP_WP_SYM_VLAN_DEL_RPT_DYN_STRIP = 0,
ULP_WP_SYM_DECAP_FUNC_NONE = 0,
ULP_WP_SYM_DECAP_FUNC_THRU_TL2 = 3,
ULP_WP_SYM_DECAP_FUNC_THRU_TL3 = 8,
@ -916,6 +946,13 @@ enum ulp_wp_sym {
};
enum ulp_thor_sym {
ULP_THOR_SYM_METADATA_OP_NORMAL = 0,
ULP_THOR_SYM_METADATA_OP_L2_HASH = 1,
ULP_THOR_SYM_METADATA_OP_L4_HASH = 2,
ULP_THOR_SYM_FWD_OP_BYPASS_CFA = 0,
ULP_THOR_SYM_FWD_OP_BYPASS_CFA_ROCE = 1,
ULP_THOR_SYM_FWD_OP_BYPASS_LKUP = 2,
ULP_THOR_SYM_FWD_OP_NORMAL_FLOW = 3,
ULP_THOR_SYM_CTXT_OPCODE_BYPASS_CFA = 0,
ULP_THOR_SYM_CTXT_OPCODE_BYPASS_LKUP = 1,
ULP_THOR_SYM_CTXT_OPCODE_META_UPDATE = 2,
@ -1066,6 +1103,10 @@ enum ulp_thor_sym {
ULP_THOR_SYM_L4_HDR_IS_UDP_TCP_YES = 1,
ULP_THOR_SYM_POP_VLAN_NO = 0,
ULP_THOR_SYM_POP_VLAN_YES = 1,
ULP_THOR_SYM_VLAN_DEL_RPT_DISABLED = 0,
ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_OUTER = 1,
ULP_THOR_SYM_VLAN_DEL_RPT_STRIP_BOTH = 2,
ULP_THOR_SYM_VLAN_DEL_RPT_DYN_STRIP = 3,
ULP_THOR_SYM_DECAP_FUNC_NONE = 0,
ULP_THOR_SYM_DECAP_FUNC_THRU_TL2 = 3,
ULP_THOR_SYM_DECAP_FUNC_THRU_TL3 = 8,
@ -1122,7 +1163,7 @@ enum ulp_thor_sym {
ULP_THOR_SYM_ACT_REC_POP_VLAN_NO = 0,
ULP_THOR_SYM_ACT_REC_METER_EN_YES = 1,
ULP_THOR_SYM_ACT_REC_METER_EN_NO = 0,
ULP_THOR_SYM_LOOPBACK_PORT = 3,
ULP_THOR_SYM_LOOPBACK_PORT = 16,
ULP_THOR_SYM_LOOPBACK_PARIF = 15,
ULP_THOR_SYM_EXT_EM_MAX_KEY_SIZE = 0,
ULP_THOR_SYM_MATCH_TYPE_EM = 0,

182
drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_tbl.c
View File

@ -3,7 +3,7 @@
* All rights reserved.
*/
/* date: Thu May 20 11:56:39 2021 */
/* date: Thu Jul 8 08:44:00 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@ -187,6 +187,10 @@ const struct bnxt_ulp_template_device_tbls ulp_template_thor_tbls[] = {
.tmpl_list_size = ULP_THOR_ACT_TMPL_LIST_SIZE,
.tbl_list = ulp_thor_act_tbl_list,
.tbl_list_size = ULP_THOR_ACT_TBL_LIST_SIZE,
.key_info_list = ulp_thor_act_key_info_list,
.key_info_list_size = ULP_THOR_ACT_KEY_INFO_LIST_SIZE,
.ident_list = ulp_thor_act_ident_list,
.ident_list_size = ULP_THOR_ACT_IDENT_LIST_SIZE,
.cond_list = ulp_thor_act_cond_list,
.cond_list_size = ULP_THOR_ACT_COND_LIST_SIZE,
.result_field_list = ulp_thor_act_result_field_list,
@ -202,6 +206,7 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
.result_byte_order = BNXT_ULP_BYTE_ORDER_LE,
.encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.wc_key_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.em_byte_order = BNXT_ULP_BYTE_ORDER_LE,
.encap_byte_swap = 1,
.int_flow_db_num_entries = 16384,
.ext_flow_db_num_entries = 32768,
@ -225,11 +230,12 @@ struct bnxt_ulp_device_params ulp_device_params[BNXT_ULP_DEVICE_ID_LAST] = {
.result_byte_order = BNXT_ULP_BYTE_ORDER_LE,
.encap_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.wc_key_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.em_byte_order = BNXT_ULP_BYTE_ORDER_BE,
.encap_byte_swap = 1,
.int_flow_db_num_entries = 16384,
.ext_flow_db_num_entries = 32768,
.mark_db_lfid_entries = 0,
.mark_db_gfid_entries = 0,
.mark_db_lfid_entries = 65536,
.mark_db_gfid_entries = 65536,
.flow_count_db_entries = 16384,
.fdb_parent_flow_entries = 2,
.num_resources_per_flow = 8,
@ -909,6 +915,14 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_PROF_FUNC,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GRE_PROF_FUNC_ID,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_ENCAP_MAC_PTR,
@ -941,12 +955,156 @@ struct bnxt_ulp_glb_resource_info ulp_glb_resource_tbl[] = {
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_2,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_3,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_4,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_5,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_2,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_3,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_4,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_0,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_0,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_WC_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_PROFILE_ID_1,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_WC_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_WC_KEY_ID_1,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_METADATA,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_METADATA_PROF_0,
.direction = TF_DIR_TX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_EM_PROF,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_PROF_ID_0,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
.resource_type = TF_IDENT_TYPE_PROF_FUNC,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_PROF_FUNC_0,
.direction = TF_DIR_RX
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_EM_FKB,
.glb_regfile_index = BNXT_ULP_GLB_RF_IDX_GLB_VFR_EM_KEY_ID_0,
.direction = TF_DIR_RX
},
{
.app_id = 1,
.device_id = BNXT_ULP_DEVICE_ID_WH_PLUS,
.resource_func = BNXT_ULP_RESOURCE_FUNC_IDENTIFIER,
@ -1204,7 +1362,7 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
.direction = TF_DIR_RX,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_ACT_ENCAP_16B,
.count = 63
.count = 15
},
{
.app_id = 0,
@ -1666,6 +1824,14 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.direction = TF_DIR_TX,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_ACT_MODIFY_64B,
.count = 32
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.direction = TF_DIR_TX,
.resource_func = BNXT_ULP_RESOURCE_FUNC_TCAM_TABLE,
.resource_type = TF_TCAM_TBL_TYPE_L2_CTXT_TCAM_HIGH,
.count = 200
@ -1703,6 +1869,14 @@ struct bnxt_ulp_resource_resv_info ulp_resource_resv_list[] = {
.count = 15232
},
{
.app_id = 0,
.device_id = BNXT_ULP_DEVICE_ID_THOR,
.direction = TF_DIR_TX,
.resource_func = BNXT_ULP_RESOURCE_FUNC_INDEX_TABLE,
.resource_type = TF_TBL_TYPE_METADATA,
.count = 1
},
{
.app_id = 1,
.device_id = BNXT_ULP_DEVICE_ID_WH_PLUS,
.direction = TF_DIR_RX,

4249
drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_act.c
View File

File diff suppressed because it is too large Load Diff

38441
drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_thor_class.c
View File

File diff suppressed because it is too large Load Diff

4
drivers/net/bnxt/tf_ulp/generic_templates/ulp_template_db_wh_plus_class.c
View File

@ -3,7 +3,7 @@
* All rights reserved.
*/
/* date: Fri May 28 16:46:46 2021 */
/* date: Wed Jun 30 14:36:16 2021 */
#include "ulp_template_db_enum.h"
#include "ulp_template_db_field.h"
@ -1488,7 +1488,7 @@ struct bnxt_ulp_mapper_tbl_info ulp_wh_plus_class_tbl_list[] = {
.cond_list_opcode = BNXT_ULP_COND_LIST_OPC_TRUE,
.cond_start_idx = 47,
.cond_nums = 0 },
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_ALLOC_WR_GLB_REGFILE,
.tbl_opcode = BNXT_ULP_INDEX_TBL_OPC_WR_GLB_REGFILE,
.tbl_operand = BNXT_ULP_GLB_RF_IDX_GLB_LB_AREC_PTR,
.fdb_opcode = BNXT_ULP_FDB_OPC_NOP,
.mark_db_opcode = BNXT_ULP_MARK_DB_OPC_NOP,

10
drivers/net/bnxt/tf_ulp/ulp_mapper.c
View File

@ -2212,6 +2212,7 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
int32_t trc;
int32_t rc = 0;
int32_t pad = 0;
enum bnxt_ulp_byte_order key_order, res_order;
tfp = bnxt_ulp_cntxt_tfp_get(parms->ulp_ctx, tbl->shared_session);
rc = bnxt_ulp_cntxt_mem_type_get(parms->ulp_ctx, &mtype);
@ -2226,11 +2227,12 @@ ulp_mapper_em_tbl_process(struct bnxt_ulp_mapper_parms *parms,
return -EINVAL;
}
key_order = dparms->em_byte_order;
res_order = dparms->em_byte_order;
/* Initialize the key/result blobs */
if (!ulp_blob_init(&key, tbl->blob_key_bit_size,
dparms->key_byte_order) ||
!ulp_blob_init(&data, tbl->result_bit_size,
dparms->result_byte_order)) {
if (!ulp_blob_init(&key, tbl->blob_key_bit_size, key_order) ||
!ulp_blob_init(&data, tbl->result_bit_size, res_order)) {
BNXT_TF_DBG(ERR, "blob inits failed.\n");
return -EINVAL;
}

18
drivers/net/bnxt/tf_ulp/ulp_rte_parser.c
View File

@ -826,12 +826,12 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
*/
ulp_rte_prsr_fld_mask(params, &idx, size,
&priority,
&priority_mask,
(vlan_mask) ? &priority_mask : NULL,
ULP_PRSR_ACT_MASK_IGNORE);
ulp_rte_prsr_fld_mask(params, &idx, size,
&vlan_tag,
&vlan_tag_mask,
(vlan_mask) ? &vlan_tag_mask : NULL,
ULP_PRSR_ACT_DEFAULT);
size = sizeof(((struct rte_flow_item_vlan *)NULL)->inner_type);
@ -859,6 +859,10 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_ONE_VTAG, 1);
ULP_BITMAP_SET(params->hdr_bitmap.bits,
BNXT_ULP_HDR_BIT_OO_VLAN);
if (vlan_mask && vlan_tag_mask)
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_OO_VLAN_FB_VID, 1);
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
!ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
outer_vtag_num == 1) {
@ -870,6 +874,10 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_O_ONE_VTAG, 0);
ULP_BITMAP_SET(params->hdr_bitmap.bits,
BNXT_ULP_HDR_BIT_OI_VLAN);
if (vlan_mask && vlan_tag_mask)
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_OI_VLAN_FB_VID, 1);
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
!inner_vtag_num) {
@ -881,6 +889,9 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_ONE_VTAG, 1);
ULP_BITMAP_SET(params->hdr_bitmap.bits,
BNXT_ULP_HDR_BIT_IO_VLAN);
if (vlan_mask && vlan_tag_mask)
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_IO_VLAN_FB_VID, 1);
inner_flag = 1;
} else if (ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_O_ETH) &&
ULP_BITMAP_ISSET(hdr_bit->bits, BNXT_ULP_HDR_BIT_I_ETH) &&
@ -893,6 +904,9 @@ ulp_rte_vlan_hdr_handler(const struct rte_flow_item *item,
ULP_COMP_FLD_IDX_WR(params, BNXT_ULP_CF_IDX_I_ONE_VTAG, 0);
ULP_BITMAP_SET(params->hdr_bitmap.bits,
BNXT_ULP_HDR_BIT_II_VLAN);
if (vlan_mask && vlan_tag_mask)
ULP_COMP_FLD_IDX_WR(params,
BNXT_ULP_CF_IDX_II_VLAN_FB_VID, 1);
inner_flag = 1;
} else {
BNXT_TF_DBG(ERR, "Error Parsing:Vlan hdr found without eth\n");

1
drivers/net/bnxt/tf_ulp/ulp_template_struct.h
View File

@ -213,6 +213,7 @@ struct bnxt_ulp_device_params {
enum bnxt_ulp_byte_order result_byte_order;
enum bnxt_ulp_byte_order encap_byte_order;
enum bnxt_ulp_byte_order wc_key_byte_order;
enum bnxt_ulp_byte_order em_byte_order;
uint8_t encap_byte_swap;
uint8_t num_phy_ports;
uint32_t mark_db_lfid_entries;

3
drivers/net/bnxt/tf_ulp/ulp_utils.c
View File

@ -964,8 +964,11 @@ ulp_blob_append(struct ulp_blob *dst, struct ulp_blob *src,
ulp_bs_put_msb(dst->data, dst->write_idx,
ULP_BLOB_BYTE, bluff);
dst->write_idx += remaining;
src_offset += remaining;
}
src_buf += ULP_BITS_2_BYTE_NR(src_offset);
/* Push the byte aligned pieces */
for (k = 0; k < ULP_BITS_2_BYTE_NR(src_len); k++) {
ulp_bs_put_msb(dst->data, dst->write_idx, ULP_BLOB_BYTE,