net/enic: change Rx queue ordering to enable RSS action
Each RTE RQ is represented on enic as a Start Of Packet (SOP) queue and overflow queue (DATA). There were arranged SOP0/DATA0, SOP1/DATA1,.. But need to be arranged SOP0, SOP1,..., DATA0, DATA1... so that rte_flow RSS queue ranges work. Signed-off-by: John Daley <johndale@cisco.com> Reviewed-by: Hyong Youb Kim <hyonkim@cisco.com>
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@ -221,25 +221,26 @@ static inline uint32_t enic_mtu_to_max_rx_pktlen(uint32_t mtu)
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/* Get the CQ index from a Start of Packet(SOP) RQ index */
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static inline unsigned int enic_sop_rq_idx_to_cq_idx(unsigned int sop_idx)
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{
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return sop_idx / 2;
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return sop_idx;
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}
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/* Get the RTE RQ index from a Start of Packet(SOP) RQ index */
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static inline unsigned int enic_sop_rq_idx_to_rte_idx(unsigned int sop_idx)
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{
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return sop_idx / 2;
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return sop_idx;
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}
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/* Get the Start of Packet(SOP) RQ index from a RTE RQ index */
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static inline unsigned int enic_rte_rq_idx_to_sop_idx(unsigned int rte_idx)
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{
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return rte_idx * 2;
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return rte_idx;
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}
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/* Get the Data RQ index from a RTE RQ index */
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static inline unsigned int enic_rte_rq_idx_to_data_idx(unsigned int rte_idx)
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static inline unsigned int enic_rte_rq_idx_to_data_idx(unsigned int rte_idx,
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struct enic *enic)
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{
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return rte_idx * 2 + 1;
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return enic->rq_count + rte_idx;
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}
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static inline unsigned int enic_vnic_rq_count(struct enic *enic)
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@ -253,7 +254,7 @@ static inline unsigned int enic_cq_rq(__rte_unused struct enic *enic, unsigned i
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* completion queue, so the completion queue number is no
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* longer the same as the rq number.
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*/
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return rq / 2;
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return rq;
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}
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static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
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@ -940,7 +940,7 @@ static void enicpmd_dev_rxq_info_get(struct rte_eth_dev *dev,
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ENICPMD_FUNC_TRACE();
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sop_queue_idx = enic_rte_rq_idx_to_sop_idx(rx_queue_id);
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data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id);
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data_queue_idx = enic_rte_rq_idx_to_data_idx(rx_queue_id, enic);
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rq_sop = &enic->rq[sop_queue_idx];
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rq_data = &enic->rq[data_queue_idx]; /* valid if data_queue_enable */
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qinfo->mp = rq_sop->mp;
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@ -222,13 +222,12 @@ void enic_init_vnic_resources(struct enic *enic)
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error_interrupt_enable,
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error_interrupt_offset);
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data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index)];
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data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(index, enic)];
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if (data_rq->in_use)
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vnic_rq_init(data_rq,
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cq_idx,
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error_interrupt_enable,
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error_interrupt_offset);
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vnic_cq_init(&enic->cq[cq_idx],
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0 /* flow_control_enable */,
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1 /* color_enable */,
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@ -620,7 +619,7 @@ int enic_enable(struct enic *enic)
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return err;
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}
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err = enic_alloc_rx_queue_mbufs(enic,
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&enic->rq[enic_rte_rq_idx_to_data_idx(index)]);
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&enic->rq[enic_rte_rq_idx_to_data_idx(index, enic)]);
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if (err) {
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/* release the allocated mbufs for the sop rq*/
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enic_rxmbuf_queue_release(enic,
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@ -808,7 +807,7 @@ int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
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{
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int rc;
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uint16_t sop_queue_idx = enic_rte_rq_idx_to_sop_idx(queue_idx);
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uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx);
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uint16_t data_queue_idx = enic_rte_rq_idx_to_data_idx(queue_idx, enic);
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struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
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struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
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unsigned int mbuf_size, mbufs_per_pkt;
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@ -1475,7 +1474,7 @@ enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
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int rc = 0;
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sop_rq = &enic->rq[enic_rte_rq_idx_to_sop_idx(rq_idx)];
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data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx)];
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data_rq = &enic->rq[enic_rte_rq_idx_to_data_idx(rq_idx, enic)];
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cq_idx = rq_idx;
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vnic_cq_clean(&enic->cq[cq_idx]);
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@ -1498,8 +1497,8 @@ enic_reinit_rq(struct enic *enic, unsigned int rq_idx)
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if (data_rq->in_use) {
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vnic_rq_init_start(data_rq,
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enic_cq_rq(enic,
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enic_rte_rq_idx_to_data_idx(rq_idx)), 0,
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data_rq->ring.desc_count - 1, 1, 0);
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enic_rte_rq_idx_to_data_idx(rq_idx, enic)),
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0, data_rq->ring.desc_count - 1, 1, 0);
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}
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rc = enic_alloc_rx_queue_mbufs(enic, sop_rq);
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