net/softnic: add TM capabilities ops
Implement ethdev TM capability APIs in SoftNIC PMD. Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com> Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com> Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
This commit is contained in:
Jasvinder Singh
Ferruh Yigit
parent
8316b9816b
commit
299a89de91
@ -43,6 +43,7 @@
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#include <rte_errno.h>
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#include <rte_ring.h>
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#include <rte_sched.h>
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#include <rte_tm_driver.h>
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#include "rte_eth_softnic.h"
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#include "rte_eth_softnic_internals.h"
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@ -224,6 +225,15 @@ pmd_link_update(struct rte_eth_dev *dev __rte_unused,
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return 0;
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}
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static int
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pmd_tm_ops_get(struct rte_eth_dev *dev, void *arg)
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{
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*(const struct rte_tm_ops **)arg =
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(tm_enabled(dev)) ? &pmd_tm_ops : NULL;
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return 0;
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}
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static const struct eth_dev_ops pmd_ops = {
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.dev_configure = pmd_dev_configure,
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.dev_start = pmd_dev_start,
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@ -233,7 +243,7 @@ static const struct eth_dev_ops pmd_ops = {
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.dev_infos_get = pmd_dev_infos_get,
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.rx_queue_setup = pmd_rx_queue_setup,
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.tx_queue_setup = pmd_tx_queue_setup,
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.tm_ops_get = NULL,
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.tm_ops_get = pmd_tm_ops_get,
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};
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static uint16_t
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@ -39,6 +39,7 @@
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#include <rte_mbuf.h>
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#include <rte_sched.h>
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#include <rte_ethdev.h>
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#include <rte_tm_driver.h>
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#include "rte_eth_softnic.h"
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@ -137,8 +138,26 @@ enum tm_node_level {
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TM_NODE_LEVEL_MAX,
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};
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/* TM Node */
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struct tm_node {
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TAILQ_ENTRY(tm_node) node;
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uint32_t node_id;
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uint32_t parent_node_id;
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uint32_t priority;
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uint32_t weight;
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uint32_t level;
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struct tm_node *parent_node;
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struct rte_tm_node_params params;
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struct rte_tm_node_stats stats;
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uint32_t n_children;
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};
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TAILQ_HEAD(tm_node_list, tm_node);
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/* TM Hierarchy Specification */
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struct tm_hierarchy {
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struct tm_node_list nodes;
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uint32_t n_tm_nodes[TM_NODE_LEVEL_MAX];
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};
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@ -191,6 +210,11 @@ struct pmd_rx_queue {
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} hard;
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};
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/**
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* Traffic Management (TM) Operation
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*/
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extern const struct rte_tm_ops pmd_tm_ops;
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int
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tm_params_check(struct pmd_params *params, uint32_t hard_rate);
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@ -206,6 +230,14 @@ tm_start(struct pmd_internals *p);
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void
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tm_stop(struct pmd_internals *p);
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static inline int
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tm_enabled(struct rte_eth_dev *dev)
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{
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struct pmd_internals *p = dev->data->dev_private;
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return (p->params.soft.flags & PMD_FEATURE_TM);
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}
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static inline int
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tm_used(struct rte_eth_dev *dev)
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{
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@ -179,3 +179,503 @@ tm_stop(struct pmd_internals *p)
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if (p->soft.tm.sched)
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rte_sched_port_free(p->soft.tm.sched);
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}
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static struct tm_node *
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tm_node_search(struct rte_eth_dev *dev, uint32_t node_id)
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{
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struct pmd_internals *p = dev->data->dev_private;
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struct tm_node_list *nl = &p->soft.tm.h.nodes;
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struct tm_node *n;
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TAILQ_FOREACH(n, nl, node)
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if (n->node_id == node_id)
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return n;
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return NULL;
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}
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static uint32_t
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tm_level_get_max_nodes(struct rte_eth_dev *dev, enum tm_node_level level)
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{
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struct pmd_internals *p = dev->data->dev_private;
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uint32_t n_queues_max = p->params.soft.tm.nb_queues;
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uint32_t n_tc_max = n_queues_max / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
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uint32_t n_pipes_max = n_tc_max / RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE;
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uint32_t n_subports_max = n_pipes_max;
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uint32_t n_root_max = 1;
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switch (level) {
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case TM_NODE_LEVEL_PORT:
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return n_root_max;
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case TM_NODE_LEVEL_SUBPORT:
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return n_subports_max;
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case TM_NODE_LEVEL_PIPE:
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return n_pipes_max;
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case TM_NODE_LEVEL_TC:
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return n_tc_max;
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case TM_NODE_LEVEL_QUEUE:
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default:
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return n_queues_max;
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}
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}
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#ifdef RTE_SCHED_RED
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#define WRED_SUPPORTED 1
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#else
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#define WRED_SUPPORTED 0
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#endif
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#define STATS_MASK_DEFAULT \
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(RTE_TM_STATS_N_PKTS | \
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RTE_TM_STATS_N_BYTES | \
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RTE_TM_STATS_N_PKTS_GREEN_DROPPED | \
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RTE_TM_STATS_N_BYTES_GREEN_DROPPED)
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#define STATS_MASK_QUEUE \
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(STATS_MASK_DEFAULT | \
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RTE_TM_STATS_N_PKTS_QUEUED)
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static const struct rte_tm_capabilities tm_cap = {
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.n_nodes_max = UINT32_MAX,
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.n_levels_max = TM_NODE_LEVEL_MAX,
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.non_leaf_nodes_identical = 0,
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.leaf_nodes_identical = 1,
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.shaper_n_max = UINT32_MAX,
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.shaper_private_n_max = UINT32_MAX,
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.shaper_private_dual_rate_n_max = 0,
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.shaper_private_rate_min = 1,
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.shaper_private_rate_max = UINT32_MAX,
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.shaper_shared_n_max = UINT32_MAX,
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.shaper_shared_n_nodes_per_shaper_max = UINT32_MAX,
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.shaper_shared_n_shapers_per_node_max = 1,
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.shaper_shared_dual_rate_n_max = 0,
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.shaper_shared_rate_min = 1,
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.shaper_shared_rate_max = UINT32_MAX,
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.shaper_pkt_length_adjust_min = RTE_TM_ETH_FRAMING_OVERHEAD_FCS,
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.shaper_pkt_length_adjust_max = RTE_TM_ETH_FRAMING_OVERHEAD_FCS,
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.sched_n_children_max = UINT32_MAX,
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.sched_sp_n_priorities_max = RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
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.sched_wfq_n_children_per_group_max = UINT32_MAX,
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.sched_wfq_n_groups_max = 1,
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.sched_wfq_weight_max = UINT32_MAX,
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.cman_head_drop_supported = 0,
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.cman_wred_context_n_max = 0,
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.cman_wred_context_private_n_max = 0,
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.cman_wred_context_shared_n_max = 0,
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.cman_wred_context_shared_n_nodes_per_context_max = 0,
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.cman_wred_context_shared_n_contexts_per_node_max = 0,
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.mark_vlan_dei_supported = {0, 0, 0},
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.mark_ip_ecn_tcp_supported = {0, 0, 0},
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.mark_ip_ecn_sctp_supported = {0, 0, 0},
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.mark_ip_dscp_supported = {0, 0, 0},
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.dynamic_update_mask = 0,
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.stats_mask = STATS_MASK_QUEUE,
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};
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/* Traffic manager capabilities get */
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static int
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pmd_tm_capabilities_get(struct rte_eth_dev *dev __rte_unused,
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struct rte_tm_capabilities *cap,
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struct rte_tm_error *error)
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{
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if (cap == NULL)
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return -rte_tm_error_set(error,
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EINVAL,
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RTE_TM_ERROR_TYPE_CAPABILITIES,
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NULL,
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rte_strerror(EINVAL));
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memcpy(cap, &tm_cap, sizeof(*cap));
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cap->n_nodes_max = tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PORT) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_SUBPORT) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PIPE) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_TC) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_QUEUE);
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cap->shaper_private_n_max =
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PORT) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_SUBPORT) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PIPE) +
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_TC);
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cap->shaper_shared_n_max = RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE *
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_SUBPORT);
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cap->shaper_n_max = cap->shaper_private_n_max +
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cap->shaper_shared_n_max;
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cap->shaper_shared_n_nodes_per_shaper_max =
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PIPE);
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cap->sched_n_children_max = RTE_MAX(
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_PIPE),
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(uint32_t)RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE);
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cap->sched_wfq_n_children_per_group_max = cap->sched_n_children_max;
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if (WRED_SUPPORTED)
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cap->cman_wred_context_private_n_max =
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tm_level_get_max_nodes(dev, TM_NODE_LEVEL_QUEUE);
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cap->cman_wred_context_n_max = cap->cman_wred_context_private_n_max +
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cap->cman_wred_context_shared_n_max;
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return 0;
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}
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static const struct rte_tm_level_capabilities tm_level_cap[] = {
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[TM_NODE_LEVEL_PORT] = {
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.n_nodes_max = 1,
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.n_nodes_nonleaf_max = 1,
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.n_nodes_leaf_max = 0,
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.non_leaf_nodes_identical = 1,
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.leaf_nodes_identical = 0,
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.nonleaf = {
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.shaper_private_supported = 1,
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.shaper_private_dual_rate_supported = 0,
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.shaper_private_rate_min = 1,
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.shaper_private_rate_max = UINT32_MAX,
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.shaper_shared_n_max = 0,
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.sched_n_children_max = UINT32_MAX,
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.sched_sp_n_priorities_max = 1,
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.sched_wfq_n_children_per_group_max = UINT32_MAX,
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.sched_wfq_n_groups_max = 1,
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.sched_wfq_weight_max = 1,
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.stats_mask = STATS_MASK_DEFAULT,
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},
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},
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[TM_NODE_LEVEL_SUBPORT] = {
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.n_nodes_max = UINT32_MAX,
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.n_nodes_nonleaf_max = UINT32_MAX,
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.n_nodes_leaf_max = 0,
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.non_leaf_nodes_identical = 1,
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.leaf_nodes_identical = 0,
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.nonleaf = {
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.shaper_private_supported = 1,
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.shaper_private_dual_rate_supported = 0,
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.shaper_private_rate_min = 1,
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.shaper_private_rate_max = UINT32_MAX,
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.shaper_shared_n_max = 0,
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.sched_n_children_max = UINT32_MAX,
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.sched_sp_n_priorities_max = 1,
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.sched_wfq_n_children_per_group_max = UINT32_MAX,
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.sched_wfq_n_groups_max = 1,
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#ifdef RTE_SCHED_SUBPORT_TC_OV
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.sched_wfq_weight_max = UINT32_MAX,
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#else
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.sched_wfq_weight_max = 1,
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#endif
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.stats_mask = STATS_MASK_DEFAULT,
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},
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},
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[TM_NODE_LEVEL_PIPE] = {
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.n_nodes_max = UINT32_MAX,
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.n_nodes_nonleaf_max = UINT32_MAX,
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.n_nodes_leaf_max = 0,
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.non_leaf_nodes_identical = 1,
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.leaf_nodes_identical = 0,
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.nonleaf = {
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.shaper_private_supported = 1,
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.shaper_private_dual_rate_supported = 0,
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.shaper_private_rate_min = 1,
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.shaper_private_rate_max = UINT32_MAX,
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.shaper_shared_n_max = 0,
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.sched_n_children_max =
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RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
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.sched_sp_n_priorities_max =
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RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
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.sched_wfq_n_children_per_group_max = 1,
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.sched_wfq_n_groups_max = 0,
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.sched_wfq_weight_max = 1,
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.stats_mask = STATS_MASK_DEFAULT,
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},
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},
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[TM_NODE_LEVEL_TC] = {
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.n_nodes_max = UINT32_MAX,
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.n_nodes_nonleaf_max = UINT32_MAX,
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.n_nodes_leaf_max = 0,
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.non_leaf_nodes_identical = 1,
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.leaf_nodes_identical = 0,
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.nonleaf = {
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.shaper_private_supported = 1,
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.shaper_private_dual_rate_supported = 0,
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.shaper_private_rate_min = 1,
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.shaper_private_rate_max = UINT32_MAX,
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.shaper_shared_n_max = 1,
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.sched_n_children_max =
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RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
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.sched_sp_n_priorities_max = 1,
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.sched_wfq_n_children_per_group_max =
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RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
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.sched_wfq_n_groups_max = 1,
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.sched_wfq_weight_max = UINT32_MAX,
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.stats_mask = STATS_MASK_DEFAULT,
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},
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},
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[TM_NODE_LEVEL_QUEUE] = {
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.n_nodes_max = UINT32_MAX,
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.n_nodes_nonleaf_max = 0,
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.n_nodes_leaf_max = UINT32_MAX,
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.non_leaf_nodes_identical = 0,
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.leaf_nodes_identical = 1,
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.leaf = {
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.shaper_private_supported = 0,
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.shaper_private_dual_rate_supported = 0,
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.shaper_private_rate_min = 0,
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.shaper_private_rate_max = 0,
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.shaper_shared_n_max = 0,
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.cman_head_drop_supported = 0,
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.cman_wred_context_private_supported = WRED_SUPPORTED,
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.cman_wred_context_shared_n_max = 0,
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.stats_mask = STATS_MASK_QUEUE,
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},
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},
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};
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/* Traffic manager level capabilities get */
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static int
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pmd_tm_level_capabilities_get(struct rte_eth_dev *dev __rte_unused,
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uint32_t level_id,
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struct rte_tm_level_capabilities *cap,
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struct rte_tm_error *error)
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{
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if (cap == NULL)
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return -rte_tm_error_set(error,
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EINVAL,
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RTE_TM_ERROR_TYPE_CAPABILITIES,
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NULL,
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rte_strerror(EINVAL));
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if (level_id >= TM_NODE_LEVEL_MAX)
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return -rte_tm_error_set(error,
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EINVAL,
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RTE_TM_ERROR_TYPE_LEVEL_ID,
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NULL,
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rte_strerror(EINVAL));
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memcpy(cap, &tm_level_cap[level_id], sizeof(*cap));
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switch (level_id) {
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case TM_NODE_LEVEL_PORT:
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cap->nonleaf.sched_n_children_max =
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tm_level_get_max_nodes(dev,
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TM_NODE_LEVEL_SUBPORT);
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cap->nonleaf.sched_wfq_n_children_per_group_max =
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cap->nonleaf.sched_n_children_max;
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break;
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case TM_NODE_LEVEL_SUBPORT:
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cap->n_nodes_max = tm_level_get_max_nodes(dev,
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TM_NODE_LEVEL_SUBPORT);
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cap->n_nodes_nonleaf_max = cap->n_nodes_max;
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cap->nonleaf.sched_n_children_max =
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tm_level_get_max_nodes(dev,
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TM_NODE_LEVEL_PIPE);
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cap->nonleaf.sched_wfq_n_children_per_group_max =
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cap->nonleaf.sched_n_children_max;
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break;
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case TM_NODE_LEVEL_PIPE:
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cap->n_nodes_max = tm_level_get_max_nodes(dev,
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TM_NODE_LEVEL_PIPE);
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cap->n_nodes_nonleaf_max = cap->n_nodes_max;
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break;
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case TM_NODE_LEVEL_TC:
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cap->n_nodes_max = tm_level_get_max_nodes(dev,
|
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TM_NODE_LEVEL_TC);
|
||||
cap->n_nodes_nonleaf_max = cap->n_nodes_max;
|
||||
break;
|
||||
|
||||
case TM_NODE_LEVEL_QUEUE:
|
||||
default:
|
||||
cap->n_nodes_max = tm_level_get_max_nodes(dev,
|
||||
TM_NODE_LEVEL_QUEUE);
|
||||
cap->n_nodes_leaf_max = cap->n_nodes_max;
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct rte_tm_node_capabilities tm_node_cap[] = {
|
||||
[TM_NODE_LEVEL_PORT] = {
|
||||
.shaper_private_supported = 1,
|
||||
.shaper_private_dual_rate_supported = 0,
|
||||
.shaper_private_rate_min = 1,
|
||||
.shaper_private_rate_max = UINT32_MAX,
|
||||
.shaper_shared_n_max = 0,
|
||||
|
||||
.nonleaf = {
|
||||
.sched_n_children_max = UINT32_MAX,
|
||||
.sched_sp_n_priorities_max = 1,
|
||||
.sched_wfq_n_children_per_group_max = UINT32_MAX,
|
||||
.sched_wfq_n_groups_max = 1,
|
||||
.sched_wfq_weight_max = 1,
|
||||
},
|
||||
|
||||
.stats_mask = STATS_MASK_DEFAULT,
|
||||
},
|
||||
|
||||
[TM_NODE_LEVEL_SUBPORT] = {
|
||||
.shaper_private_supported = 1,
|
||||
.shaper_private_dual_rate_supported = 0,
|
||||
.shaper_private_rate_min = 1,
|
||||
.shaper_private_rate_max = UINT32_MAX,
|
||||
.shaper_shared_n_max = 0,
|
||||
|
||||
.nonleaf = {
|
||||
.sched_n_children_max = UINT32_MAX,
|
||||
.sched_sp_n_priorities_max = 1,
|
||||
.sched_wfq_n_children_per_group_max = UINT32_MAX,
|
||||
.sched_wfq_n_groups_max = 1,
|
||||
.sched_wfq_weight_max = UINT32_MAX,
|
||||
},
|
||||
|
||||
.stats_mask = STATS_MASK_DEFAULT,
|
||||
},
|
||||
|
||||
[TM_NODE_LEVEL_PIPE] = {
|
||||
.shaper_private_supported = 1,
|
||||
.shaper_private_dual_rate_supported = 0,
|
||||
.shaper_private_rate_min = 1,
|
||||
.shaper_private_rate_max = UINT32_MAX,
|
||||
.shaper_shared_n_max = 0,
|
||||
|
||||
.nonleaf = {
|
||||
.sched_n_children_max =
|
||||
RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
|
||||
.sched_sp_n_priorities_max =
|
||||
RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE,
|
||||
.sched_wfq_n_children_per_group_max = 1,
|
||||
.sched_wfq_n_groups_max = 0,
|
||||
.sched_wfq_weight_max = 1,
|
||||
},
|
||||
|
||||
.stats_mask = STATS_MASK_DEFAULT,
|
||||
},
|
||||
|
||||
[TM_NODE_LEVEL_TC] = {
|
||||
.shaper_private_supported = 1,
|
||||
.shaper_private_dual_rate_supported = 0,
|
||||
.shaper_private_rate_min = 1,
|
||||
.shaper_private_rate_max = UINT32_MAX,
|
||||
.shaper_shared_n_max = 1,
|
||||
|
||||
.nonleaf = {
|
||||
.sched_n_children_max =
|
||||
RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
|
||||
.sched_sp_n_priorities_max = 1,
|
||||
.sched_wfq_n_children_per_group_max =
|
||||
RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
|
||||
.sched_wfq_n_groups_max = 1,
|
||||
.sched_wfq_weight_max = UINT32_MAX,
|
||||
},
|
||||
|
||||
.stats_mask = STATS_MASK_DEFAULT,
|
||||
},
|
||||
|
||||
[TM_NODE_LEVEL_QUEUE] = {
|
||||
.shaper_private_supported = 0,
|
||||
.shaper_private_dual_rate_supported = 0,
|
||||
.shaper_private_rate_min = 0,
|
||||
.shaper_private_rate_max = 0,
|
||||
.shaper_shared_n_max = 0,
|
||||
|
||||
|
||||
.leaf = {
|
||||
.cman_head_drop_supported = 0,
|
||||
.cman_wred_context_private_supported = WRED_SUPPORTED,
|
||||
.cman_wred_context_shared_n_max = 0,
|
||||
},
|
||||
|
||||
.stats_mask = STATS_MASK_QUEUE,
|
||||
},
|
||||
};
|
||||
|
||||
/* Traffic manager node capabilities get */
|
||||
static int
|
||||
pmd_tm_node_capabilities_get(struct rte_eth_dev *dev __rte_unused,
|
||||
uint32_t node_id,
|
||||
struct rte_tm_node_capabilities *cap,
|
||||
struct rte_tm_error *error)
|
||||
{
|
||||
struct tm_node *tm_node;
|
||||
|
||||
if (cap == NULL)
|
||||
return -rte_tm_error_set(error,
|
||||
EINVAL,
|
||||
RTE_TM_ERROR_TYPE_CAPABILITIES,
|
||||
NULL,
|
||||
rte_strerror(EINVAL));
|
||||
|
||||
tm_node = tm_node_search(dev, node_id);
|
||||
if (tm_node == NULL)
|
||||
return -rte_tm_error_set(error,
|
||||
EINVAL,
|
||||
RTE_TM_ERROR_TYPE_NODE_ID,
|
||||
NULL,
|
||||
rte_strerror(EINVAL));
|
||||
|
||||
memcpy(cap, &tm_node_cap[tm_node->level], sizeof(*cap));
|
||||
|
||||
switch (tm_node->level) {
|
||||
case TM_NODE_LEVEL_PORT:
|
||||
cap->nonleaf.sched_n_children_max =
|
||||
tm_level_get_max_nodes(dev,
|
||||
TM_NODE_LEVEL_SUBPORT);
|
||||
cap->nonleaf.sched_wfq_n_children_per_group_max =
|
||||
cap->nonleaf.sched_n_children_max;
|
||||
break;
|
||||
|
||||
case TM_NODE_LEVEL_SUBPORT:
|
||||
cap->nonleaf.sched_n_children_max =
|
||||
tm_level_get_max_nodes(dev,
|
||||
TM_NODE_LEVEL_PIPE);
|
||||
cap->nonleaf.sched_wfq_n_children_per_group_max =
|
||||
cap->nonleaf.sched_n_children_max;
|
||||
break;
|
||||
|
||||
case TM_NODE_LEVEL_PIPE:
|
||||
case TM_NODE_LEVEL_TC:
|
||||
case TM_NODE_LEVEL_QUEUE:
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct rte_tm_ops pmd_tm_ops = {
|
||||
.capabilities_get = pmd_tm_capabilities_get,
|
||||
.level_capabilities_get = pmd_tm_level_capabilities_get,
|
||||
.node_capabilities_get = pmd_tm_node_capabilities_get,
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user