crypto/qat: unify asymmetric functions
This patch removes qat_asym_pmd.c and integrates all the functions into qat_asym.c. The unified/integrated asym crypto pmd functions should make them easier to maintain. Signed-off-by: Kai Ji <kai.ji@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
This commit is contained in:
Kai Ji
Akhil Goyal
parent
e0a6761022
commit
2becec6bee
@ -74,7 +74,7 @@ endif
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if qat_crypto
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foreach f: ['qat_sym.c', 'qat_sym_session.c',
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'qat_sym_hw_dp.c', 'qat_asym_pmd.c', 'qat_asym.c', 'qat_crypto.c',
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'qat_sym_hw_dp.c', 'qat_asym.c', 'qat_crypto.c',
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'dev/qat_sym_pmd_gen1.c',
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'dev/qat_asym_pmd_gen1.c',
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'dev/qat_crypto_pmd_gen2.c',
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@ -19,6 +19,32 @@ uint8_t qat_asym_driver_id;
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struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[QAT_N_GENS];
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void
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qat_asym_init_op_cookie(void *op_cookie)
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{
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int j;
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struct qat_asym_op_cookie *cookie = op_cookie;
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cookie->input_addr = rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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input_params_ptrs);
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cookie->output_addr = rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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output_params_ptrs);
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for (j = 0; j < 8; j++) {
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cookie->input_params_ptrs[j] =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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input_array[j]);
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cookie->output_params_ptrs[j] =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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output_array[j]);
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}
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}
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/* An rte_driver is needed in the registration of both the device and the driver
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* with cryptodev.
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* The actual qat pci's rte_driver can't be used as its name represents
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@ -788,6 +814,160 @@ qat_asym_session_clear(struct rte_cryptodev *dev,
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memset(s, 0, qat_asym_session_get_private_size(dev));
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}
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static uint16_t
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qat_asym_crypto_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_enqueue_op_burst(qp, qat_asym_build_request, (void **)ops,
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nb_ops);
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}
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static uint16_t
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qat_asym_crypto_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_dequeue_op_burst(qp, (void **)ops, qat_asym_process_response,
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nb_ops);
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}
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int
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qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
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struct qat_dev_cmd_param *qat_dev_cmd_param)
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{
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struct qat_cryptodev_private *internals;
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struct rte_cryptodev *cryptodev;
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struct qat_device_info *qat_dev_instance =
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&qat_pci_devs[qat_pci_dev->qat_dev_id];
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struct rte_cryptodev_pmd_init_params init_params = {
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.name = "",
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.socket_id = qat_dev_instance->pci_dev->device.numa_node,
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.private_data_size = sizeof(struct qat_cryptodev_private)
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};
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struct qat_capabilities_info capa_info;
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const struct rte_cryptodev_capabilities *capabilities;
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const struct qat_crypto_gen_dev_ops *gen_dev_ops =
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&qat_asym_gen_dev_ops[qat_pci_dev->qat_dev_gen];
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
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uint64_t capa_size;
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int i = 0;
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snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s",
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qat_pci_dev->name, "asym");
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QAT_LOG(DEBUG, "Creating QAT ASYM device %s\n", name);
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if (gen_dev_ops->cryptodev_ops == NULL) {
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QAT_LOG(ERR, "Device %s does not support asymmetric crypto",
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name);
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return -(EFAULT);
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}
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if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
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qat_pci_dev->qat_asym_driver_id =
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qat_asym_driver_id;
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} else if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
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if (qat_pci_dev->qat_asym_driver_id !=
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qat_asym_driver_id) {
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QAT_LOG(ERR,
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"Device %s have different driver id than corresponding device in primary process",
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name);
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return -(EFAULT);
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}
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}
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/* Populate subset device to use in cryptodev device creation */
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qat_dev_instance->asym_rte_dev.driver = &cryptodev_qat_asym_driver;
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qat_dev_instance->asym_rte_dev.numa_node =
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qat_dev_instance->pci_dev->device.numa_node;
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qat_dev_instance->asym_rte_dev.devargs = NULL;
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cryptodev = rte_cryptodev_pmd_create(name,
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&(qat_dev_instance->asym_rte_dev), &init_params);
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if (cryptodev == NULL)
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return -ENODEV;
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qat_dev_instance->asym_rte_dev.name = cryptodev->data->name;
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cryptodev->driver_id = qat_asym_driver_id;
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cryptodev->dev_ops = gen_dev_ops->cryptodev_ops;
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cryptodev->enqueue_burst = qat_asym_crypto_enqueue_op_burst;
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cryptodev->dequeue_burst = qat_asym_crypto_dequeue_op_burst;
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cryptodev->feature_flags = gen_dev_ops->get_feature_flags(qat_pci_dev);
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
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"QAT_ASYM_CAPA_GEN_%d",
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qat_pci_dev->qat_dev_gen);
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internals = cryptodev->data->dev_private;
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internals->qat_dev = qat_pci_dev;
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internals->dev_id = cryptodev->data->dev_id;
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capa_info = gen_dev_ops->get_capabilities(qat_pci_dev);
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capabilities = capa_info.data;
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capa_size = capa_info.size;
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internals->capa_mz = rte_memzone_lookup(capa_memz_name);
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if (internals->capa_mz == NULL) {
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internals->capa_mz = rte_memzone_reserve(capa_memz_name,
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capa_size, rte_socket_id(), 0);
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if (internals->capa_mz == NULL) {
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QAT_LOG(DEBUG,
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"Error allocating memzone for capabilities, "
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"destroying PMD for %s",
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name);
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rte_cryptodev_pmd_destroy(cryptodev);
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memset(&qat_dev_instance->asym_rte_dev, 0,
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sizeof(qat_dev_instance->asym_rte_dev));
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return -EFAULT;
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}
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}
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memcpy(internals->capa_mz->addr, capabilities, capa_size);
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internals->qat_dev_capabilities = internals->capa_mz->addr;
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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if (!strcmp(qat_dev_cmd_param[i].name, ASYM_ENQ_THRESHOLD_NAME))
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internals->min_enq_burst_threshold =
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qat_dev_cmd_param[i].val;
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i++;
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}
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qat_pci_dev->asym_dev = internals;
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internals->service_type = QAT_SERVICE_ASYMMETRIC;
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QAT_LOG(DEBUG, "Created QAT ASYM device %s as cryptodev instance %d",
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cryptodev->data->name, internals->dev_id);
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return 0;
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}
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int
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qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)
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{
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struct rte_cryptodev *cryptodev;
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if (qat_pci_dev == NULL)
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return -ENODEV;
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if (qat_pci_dev->asym_dev == NULL)
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return 0;
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if (rte_eal_process_type() == RTE_PROC_PRIMARY)
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rte_memzone_free(qat_pci_dev->asym_dev->capa_mz);
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/* free crypto device */
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cryptodev = rte_cryptodev_pmd_get_dev(
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qat_pci_dev->asym_dev->dev_id);
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rte_cryptodev_pmd_destroy(cryptodev);
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qat_pci_devs[qat_pci_dev->qat_dev_id].asym_rte_dev.name = NULL;
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qat_pci_dev->asym_dev = NULL;
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return 0;
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}
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static struct cryptodev_driver qat_crypto_drv;
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RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
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cryptodev_qat_asym_driver,
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@ -1,231 +0,0 @@
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2019 Intel Corporation
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*/
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#include <cryptodev_pmd.h>
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#include "qat_logs.h"
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#include "qat_crypto.h"
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#include "qat_asym.h"
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#include "qat_asym_pmd.h"
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extern uint8_t qat_asym_driver_id;
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extern struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[QAT_N_GENS];
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void
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qat_asym_init_op_cookie(void *op_cookie)
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{
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int j;
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struct qat_asym_op_cookie *cookie = op_cookie;
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cookie->input_addr = rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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input_params_ptrs);
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cookie->output_addr = rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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output_params_ptrs);
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for (j = 0; j < 8; j++) {
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cookie->input_params_ptrs[j] =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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input_array[j]);
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cookie->output_params_ptrs[j] =
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rte_mempool_virt2iova(cookie) +
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offsetof(struct qat_asym_op_cookie,
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output_array[j]);
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}
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}
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static struct rte_cryptodev_ops crypto_qat_ops = {
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/* Device related operations */
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.dev_configure = qat_cryptodev_config,
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.dev_start = qat_cryptodev_start,
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.dev_stop = qat_cryptodev_stop,
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.dev_close = qat_cryptodev_close,
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.dev_infos_get = qat_cryptodev_info_get,
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.stats_get = qat_cryptodev_stats_get,
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.stats_reset = qat_cryptodev_stats_reset,
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.queue_pair_setup = qat_cryptodev_qp_setup,
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.queue_pair_release = qat_cryptodev_qp_release,
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/* Crypto related operations */
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.asym_session_get_size = qat_asym_session_get_private_size,
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.asym_session_configure = qat_asym_session_configure,
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.asym_session_clear = qat_asym_session_clear
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};
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uint16_t qat_asym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_enqueue_op_burst(qp, NULL, (void **)ops, nb_ops);
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}
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uint16_t qat_asym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
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uint16_t nb_ops)
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{
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return qat_dequeue_op_burst(qp, (void **)ops, NULL, nb_ops);
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}
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/* An rte_driver is needed in the registration of both the device and the driver
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* with cryptodev.
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* The actual qat pci's rte_driver can't be used as its name represents
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* the whole pci device with all services. Think of this as a holder for a name
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* for the crypto part of the pci device.
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*/
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static const char qat_asym_drv_name[] = RTE_STR(CRYPTODEV_NAME_QAT_ASYM_PMD);
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static const struct rte_driver cryptodev_qat_asym_driver = {
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.name = qat_asym_drv_name,
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.alias = qat_asym_drv_name
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};
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int
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qat_asym_dev_create(struct qat_pci_device *qat_pci_dev,
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struct qat_dev_cmd_param *qat_dev_cmd_param)
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{
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int i = 0;
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struct qat_device_info *qat_dev_instance =
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&qat_pci_devs[qat_pci_dev->qat_dev_id];
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struct rte_cryptodev_pmd_init_params init_params = {
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.name = "",
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.socket_id = qat_dev_instance->pci_dev->device.numa_node,
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.private_data_size = sizeof(struct qat_cryptodev_private)
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};
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struct qat_capabilities_info capa_info;
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const struct rte_cryptodev_capabilities *capabilities;
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const struct qat_crypto_gen_dev_ops *gen_dev_ops =
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&qat_asym_gen_dev_ops[qat_pci_dev->qat_dev_gen];
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char name[RTE_CRYPTODEV_NAME_MAX_LEN];
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char capa_memz_name[RTE_CRYPTODEV_NAME_MAX_LEN];
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struct rte_cryptodev *cryptodev;
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struct qat_cryptodev_private *internals;
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uint64_t capa_size;
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snprintf(name, RTE_CRYPTODEV_NAME_MAX_LEN, "%s_%s",
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qat_pci_dev->name, "asym");
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QAT_LOG(DEBUG, "Creating QAT ASYM device %s\n", name);
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if (gen_dev_ops->cryptodev_ops == NULL) {
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QAT_LOG(ERR, "Device %s does not support asymmetric crypto",
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name);
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return -EFAULT;
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}
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if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
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qat_pci_dev->qat_asym_driver_id =
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qat_asym_driver_id;
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} else if (rte_eal_process_type() == RTE_PROC_SECONDARY) {
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if (qat_pci_dev->qat_asym_driver_id !=
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qat_asym_driver_id) {
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QAT_LOG(ERR,
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"Device %s have different driver id than corresponding device in primary process",
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name);
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return -(EFAULT);
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}
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}
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/* Populate subset device to use in cryptodev device creation */
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qat_dev_instance->asym_rte_dev.driver = &cryptodev_qat_asym_driver;
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qat_dev_instance->asym_rte_dev.numa_node =
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qat_dev_instance->pci_dev->device.numa_node;
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qat_dev_instance->asym_rte_dev.devargs = NULL;
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cryptodev = rte_cryptodev_pmd_create(name,
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&(qat_dev_instance->asym_rte_dev), &init_params);
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if (cryptodev == NULL)
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return -ENODEV;
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qat_dev_instance->asym_rte_dev.name = cryptodev->data->name;
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cryptodev->driver_id = qat_asym_driver_id;
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cryptodev->dev_ops = &crypto_qat_ops;
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cryptodev->enqueue_burst = qat_asym_pmd_enqueue_op_burst;
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cryptodev->dequeue_burst = qat_asym_pmd_dequeue_op_burst;
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cryptodev->feature_flags = gen_dev_ops->get_feature_flags(qat_pci_dev);
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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snprintf(capa_memz_name, RTE_CRYPTODEV_NAME_MAX_LEN,
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"QAT_ASYM_CAPA_GEN_%d",
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qat_pci_dev->qat_dev_gen);
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internals = cryptodev->data->dev_private;
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internals->qat_dev = qat_pci_dev;
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internals->dev_id = cryptodev->data->dev_id;
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internals->service_type = QAT_SERVICE_ASYMMETRIC;
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capa_info = gen_dev_ops->get_capabilities(qat_pci_dev);
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capabilities = capa_info.data;
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capa_size = capa_info.size;
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internals->capa_mz = rte_memzone_lookup(capa_memz_name);
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if (internals->capa_mz == NULL) {
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internals->capa_mz = rte_memzone_reserve(capa_memz_name,
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capa_size, rte_socket_id(), 0);
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if (internals->capa_mz == NULL) {
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QAT_LOG(DEBUG,
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"Error allocating memzone for capabilities, "
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"destroying PMD for %s",
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name);
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rte_cryptodev_pmd_destroy(cryptodev);
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memset(&qat_dev_instance->asym_rte_dev, 0,
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sizeof(qat_dev_instance->asym_rte_dev));
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return -EFAULT;
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}
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}
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memcpy(internals->capa_mz->addr, capabilities, capa_size);
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internals->qat_dev_capabilities = internals->capa_mz->addr;
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while (1) {
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if (qat_dev_cmd_param[i].name == NULL)
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break;
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if (!strcmp(qat_dev_cmd_param[i].name, ASYM_ENQ_THRESHOLD_NAME))
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internals->min_enq_burst_threshold =
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qat_dev_cmd_param[i].val;
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i++;
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}
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qat_pci_dev->asym_dev = internals;
|
||||
|
||||
rte_cryptodev_pmd_probing_finish(cryptodev);
|
||||
|
||||
QAT_LOG(DEBUG, "Created QAT ASYM device %s as cryptodev instance %d",
|
||||
cryptodev->data->name, internals->dev_id);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
qat_asym_dev_destroy(struct qat_pci_device *qat_pci_dev)
|
||||
{
|
||||
struct rte_cryptodev *cryptodev;
|
||||
|
||||
if (qat_pci_dev == NULL)
|
||||
return -ENODEV;
|
||||
if (qat_pci_dev->asym_dev == NULL)
|
||||
return 0;
|
||||
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
|
||||
rte_memzone_free(qat_pci_dev->asym_dev->capa_mz);
|
||||
|
||||
/* free crypto device */
|
||||
cryptodev = rte_cryptodev_pmd_get_dev(
|
||||
qat_pci_dev->asym_dev->dev_id);
|
||||
rte_cryptodev_pmd_destroy(cryptodev);
|
||||
qat_pci_devs[qat_pci_dev->qat_dev_id].asym_rte_dev.name = NULL;
|
||||
qat_pci_dev->asym_dev = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct cryptodev_driver qat_crypto_drv;
|
||||
RTE_PMD_REGISTER_CRYPTO_DRIVER(qat_crypto_drv,
|
||||
cryptodev_qat_asym_driver,
|
||||
qat_asym_driver_id);
|
||||
@ -1,54 +0,0 @@
|
||||
/* SPDX-License-Identifier: BSD-3-Clause
|
||||
* Copyright(c) 2019 Intel Corporation
|
||||
*/
|
||||
|
||||
|
||||
#ifndef _QAT_ASYM_PMD_H_
|
||||
#define _QAT_ASYM_PMD_H_
|
||||
|
||||
#include <rte_cryptodev.h>
|
||||
#include "qat_crypto.h"
|
||||
#include "qat_device.h"
|
||||
|
||||
/** Intel(R) QAT Asymmetric Crypto PMD name */
|
||||
#define CRYPTODEV_NAME_QAT_ASYM_PMD crypto_qat_asym
|
||||
|
||||
|
||||
/**
|
||||
* Helper function to add an asym capability
|
||||
* <name> <op type> <modlen (min, max, increment)>
|
||||
**/
|
||||
#define QAT_ASYM_CAP(n, o, l, r, i) \
|
||||
{ \
|
||||
.op = RTE_CRYPTO_OP_TYPE_ASYMMETRIC, \
|
||||
{.asym = { \
|
||||
.xform_capa = { \
|
||||
.xform_type = RTE_CRYPTO_ASYM_XFORM_##n,\
|
||||
.op_types = o, \
|
||||
{ \
|
||||
.modlen = { \
|
||||
.min = l, \
|
||||
.max = r, \
|
||||
.increment = i \
|
||||
}, } \
|
||||
} \
|
||||
}, \
|
||||
} \
|
||||
}
|
||||
|
||||
extern uint8_t qat_asym_driver_id;
|
||||
|
||||
extern struct qat_crypto_gen_dev_ops qat_asym_gen_dev_ops[];
|
||||
|
||||
void
|
||||
qat_asym_init_op_cookie(void *op_cookie);
|
||||
|
||||
uint16_t
|
||||
qat_asym_pmd_enqueue_op_burst(void *qp, struct rte_crypto_op **ops,
|
||||
uint16_t nb_ops);
|
||||
|
||||
uint16_t
|
||||
qat_asym_pmd_dequeue_op_burst(void *qp, struct rte_crypto_op **ops,
|
||||
uint16_t nb_ops);
|
||||
|
||||
#endif /* _QAT_ASYM_PMD_H_ */
|
||||
Loading…
Reference in New Issue
Block a user