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net/mlx5: check max SIMD bitwidth

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When choosing a vector path to take, an extra condition must be
satisfied to ensure the max SIMD bitwidth allows for the CPU enabled
path.

Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
This commit is contained in:
Ciara Power 2020-10-19 15:48:51 +02:00 committed by David Marchand
parent a3fd191a41
commit 2c5e0dd21f
1 changed files with 3 additions and 0 deletions
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3
drivers/net/mlx5/mlx5_rxtx_vec.c
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@ -10,6 +10,7 @@
#include <rte_mbuf.h>
#include <rte_mempool.h>
#include <rte_prefetch.h>
#include <rte_vect.h>
#include <mlx5_glue.h>
#include <mlx5_prm.h>
@ -148,6 +149,8 @@ mlx5_check_vec_rx_support(struct rte_eth_dev *dev)
struct mlx5_priv *priv = dev->data->dev_private;
uint32_t i;
if (rte_vect_get_max_simd_bitwidth() < RTE_VECT_SIMD_128)
return -ENOTSUP;
if (!priv->config.rx_vec_en)
return -ENOTSUP;
if (mlx5_mprq_enabled(dev))