i40e/base: add wait states to NVM state machine

This adds wait states to the NVM update state machine to signify when
waiting for an update operation to finish, whether we're in the middle
of a set of Write operations, or we're now idle but waiting.

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This commit is contained in:
Jingjing Wu 2015-09-06 15:11:24 +08:00 committed by Thomas Monjalon
parent 7df22f55cc
commit 2d01a42227
3 changed files with 52 additions and 13 deletions

View File

@ -1058,6 +1058,19 @@ clean_arq_element_out:
i40e_release_nvm(hw);
hw->aq.nvm_release_on_done = false;
}
switch (hw->nvmupd_state) {
case I40E_NVMUPD_STATE_INIT_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
break;
case I40E_NVMUPD_STATE_WRITE_WAIT:
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
break;
default:
break;
}
}
#endif

View File

@ -762,6 +762,12 @@ enum i40e_status_code i40e_nvmupd_command(struct i40e_hw *hw,
status = i40e_nvmupd_state_writing(hw, cmd, bytes, perrno);
break;
case I40E_NVMUPD_STATE_INIT_WAIT:
case I40E_NVMUPD_STATE_WRITE_WAIT:
status = I40E_ERR_NOT_READY;
*perrno = -EBUSY;
break;
default:
/* invalid state, should never happen */
i40e_debug(hw, I40E_DEBUG_NVM,
@ -827,10 +833,12 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
hw->aq.asq_last_status);
} else {
status = i40e_nvmupd_nvm_erase(hw, cmd, perrno);
if (status)
if (status) {
i40e_release_nvm(hw);
else
} else {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
}
break;
@ -841,10 +849,12 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
hw->aq.asq_last_status);
} else {
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (status)
if (status) {
i40e_release_nvm(hw);
else
} else {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
}
break;
@ -858,7 +868,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
if (status)
i40e_release_nvm(hw);
else
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITING;
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
}
break;
@ -877,6 +887,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_init(struct i40e_hw *hw,
i40e_release_nvm(hw);
} else {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
}
break;
@ -906,7 +917,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_reading(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
u8 *bytes, int *perrno)
{
enum i40e_status_code status;
enum i40e_status_code status = I40E_SUCCESS;
enum i40e_nvmupd_cmd upd_cmd;
DEBUGFUNC("i40e_nvmupd_state_reading");
@ -950,7 +961,7 @@ STATIC enum i40e_status_code i40e_nvmupd_state_writing(struct i40e_hw *hw,
struct i40e_nvm_access *cmd,
u8 *bytes, int *perrno)
{
enum i40e_status_code status;
enum i40e_status_code status = I40E_SUCCESS;
enum i40e_nvmupd_cmd upd_cmd;
bool retry_attempt = false;
@ -962,13 +973,22 @@ retry:
switch (upd_cmd) {
case I40E_NVMUPD_WRITE_CON:
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (!status)
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
break;
case I40E_NVMUPD_WRITE_LCB:
status = i40e_nvmupd_nvm_write(hw, cmd, bytes, perrno);
if (!status)
if (status) {
*perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(status,
hw->aq.asq_last_status) :
-EIO;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
break;
case I40E_NVMUPD_CSUM_CON:
@ -979,19 +999,23 @@ retry:
hw->aq.asq_last_status) :
-EIO;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->nvmupd_state = I40E_NVMUPD_STATE_WRITE_WAIT;
}
break;
case I40E_NVMUPD_CSUM_LCB:
status = i40e_update_nvm_checksum(hw);
if (status)
if (status) {
*perrno = hw->aq.asq_last_status ?
i40e_aq_rc_to_posix(status,
hw->aq.asq_last_status) :
-EIO;
else
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
} else {
hw->aq.nvm_release_on_done = true;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT;
hw->nvmupd_state = I40E_NVMUPD_STATE_INIT_WAIT;
}
break;
default:

View File

@ -368,7 +368,9 @@ enum i40e_nvmupd_cmd {
enum i40e_nvmupd_state {
I40E_NVMUPD_STATE_INIT,
I40E_NVMUPD_STATE_READING,
I40E_NVMUPD_STATE_WRITING
I40E_NVMUPD_STATE_WRITING,
I40E_NVMUPD_STATE_INIT_WAIT,
I40E_NVMUPD_STATE_WRITE_WAIT,
};
/* nvm_access definition and its masks/shifts need to be accessible to