net/mlx4: verify Tx max sges
Max number of Tx scatter-gather entries is a property of the device and is queried at init. This value was not changed in a while and most probably will not be changed in the future, Therefore and in order to enhance Tx performance, the Tx max-sge value is hardcoded in mlx4 PRM code. This patch adds a verification that the above assumption still holds and that the hardcoded value is still supported by the mlx4 hardware. Signed-off-by: Moti Haimovsky <motih@mellanox.com> Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
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@ -505,6 +505,7 @@ mlx4_pci_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
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rte_errno = ENODEV;
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goto error;
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}
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assert(device_attr.max_sge >= MLX4_MAX_SGE);
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for (i = 0; i < device_attr.phys_port_cnt; i++) {
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uint32_t port = i + 1; /* ports are indexed from one */
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struct ibv_context *ctx = NULL;
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@ -53,7 +53,10 @@
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#define MLX4_TXBB_SIZE (1 << MLX4_TXBB_SHIFT)
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/* Typical TSO descriptor with 16 gather entries is 352 bytes. */
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#define MLX4_MAX_WQE_SIZE 512
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#define MLX4_MAX_SGE 32
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#define MLX4_MAX_WQE_SIZE \
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(MLX4_MAX_SGE * sizeof(struct mlx4_wqe_data_seg) + \
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sizeof(struct mlx4_wqe_ctrl_seg))
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#define MLX4_SEG_SHIFT 4
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/* Send queue stamping/invalidating information. */
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