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crypto/dpaa_sec: support AES-CMAC integrity check

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This patch adds support for AES_CMAC integrity
in non-security mode.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This commit is contained in:
Gagandeep Singh 2021-09-08 12:29:47 +05:30 committed by Akhil Goyal
parent 66f95673b9
commit 2ed12d9b63
4 changed files with 55 additions and 1 deletions
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1
doc/guides/cryptodevs/features/dpaa_sec.ini
View File

@ -48,6 +48,7 @@ SHA512 HMAC = Y
SNOW3G UIA2 = Y SNOW3G UIA2 = Y
ZUC EIA3 = Y ZUC EIA3 = Y
AES XCBC MAC = Y AES XCBC MAC = Y
AES CMAC (128) = Y
; ;
; Supported AEAD algorithms of the 'dpaa_sec' crypto driver. ; Supported AEAD algorithms of the 'dpaa_sec' crypto driver.

2
doc/guides/rel_notes/release_21_11.rst
View File

@ -75,7 +75,7 @@ New Features
* **Updated NXP dpaa_sec crypto PMD.** * **Updated NXP dpaa_sec crypto PMD.**
* Added DES-CBC, AES-XCBC-MAC and non-HMAC algo support. * Added DES-CBC, AES-XCBC-MAC, AES-CMAC and non-HMAC algo support.
Removed Items Removed Items

10
drivers/crypto/dpaa_sec/dpaa_sec.c
View File

@ -528,6 +528,7 @@ dpaa_sec_prep_cdb(dpaa_sec_session *ses)
ses->digest_length); ses->digest_length);
break; break;
case RTE_CRYPTO_AUTH_AES_XCBC_MAC: case RTE_CRYPTO_AUTH_AES_XCBC_MAC:
case RTE_CRYPTO_AUTH_AES_CMAC:
shared_desc_len = cnstr_shdsc_aes_mac( shared_desc_len = cnstr_shdsc_aes_mac(
cdb->sh_desc, cdb->sh_desc,
true, swap, SHR_NEVER, true, swap, SHR_NEVER,
@ -2180,6 +2181,10 @@ dpaa_sec_auth_init(struct rte_cryptodev *dev __rte_unused,
session->auth_key.alg = OP_ALG_ALGSEL_AES; session->auth_key.alg = OP_ALG_ALGSEL_AES;
session->auth_key.algmode = OP_ALG_AAI_XCBC_MAC; session->auth_key.algmode = OP_ALG_AAI_XCBC_MAC;
break; break;
case RTE_CRYPTO_AUTH_AES_CMAC:
session->auth_key.alg = OP_ALG_ALGSEL_AES;
session->auth_key.algmode = OP_ALG_AAI_CMAC;
break;
default: default:
DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u", DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u",
xform->auth.algo); xform->auth.algo);
@ -2265,6 +2270,10 @@ dpaa_sec_chain_init(struct rte_cryptodev *dev __rte_unused,
session->auth_key.alg = OP_ALG_ALGSEL_AES; session->auth_key.alg = OP_ALG_ALGSEL_AES;
session->auth_key.algmode = OP_ALG_AAI_XCBC_MAC; session->auth_key.algmode = OP_ALG_AAI_XCBC_MAC;
break; break;
case RTE_CRYPTO_AUTH_AES_CMAC:
session->auth_key.alg = OP_ALG_ALGSEL_AES;
session->auth_key.algmode = OP_ALG_AAI_CMAC;
break;
default: default:
DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u", DPAA_SEC_ERR("Crypto: Unsupported Auth specified %u",
auth_xform->algo); auth_xform->algo);
@ -2700,6 +2709,7 @@ dpaa_sec_ipsec_proto_init(struct rte_crypto_cipher_xform *cipher_xform,
break; break;
case RTE_CRYPTO_AUTH_AES_CMAC: case RTE_CRYPTO_AUTH_AES_CMAC:
session->auth_key.alg = OP_PCL_IPSEC_AES_CMAC_96; session->auth_key.alg = OP_PCL_IPSEC_AES_CMAC_96;
session->auth_key.algmode = OP_ALG_AAI_CMAC;
break; break;
case RTE_CRYPTO_AUTH_NULL: case RTE_CRYPTO_AUTH_NULL:
session->auth_key.alg = OP_PCL_IPSEC_HMAC_NULL; session->auth_key.alg = OP_PCL_IPSEC_HMAC_NULL;

43
drivers/crypto/dpaa_sec/dpaa_sec.h
View File

@ -712,6 +712,49 @@ static const struct rte_cryptodev_capabilities dpaa_sec_capabilities[] = {
}, } }, }
}, } }, }
}, },
{ /* AES CMAC */
.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
{.sym = {
.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
{.auth = {
.algo = RTE_CRYPTO_AUTH_AES_CMAC,
.block_size = 16,
.key_size = {
.min = 1,
.max = 16,
.increment = 1
},
.digest_size = {
.min = 12,
.max = 16,
.increment = 4
},
.iv_size = { 0 }
}, }
}, }
},
{ /* AES XCBC HMAC */
.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
{.sym = {
.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
{.auth = {
.algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
.block_size = 16,
.key_size = {
.min = 1,
.max = 16,
.increment = 1
},
.digest_size = {
.min = 12,
.max = 16,
.increment = 4
},
.aad_size = { 0 },
.iv_size = { 0 }
}, }
}, }
},
RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST() RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
}; };