pipeline: add SWX instruction optimizer
Instruction optimizer. Detects frequent patterns and replaces them with some more powerful vector-like pipeline instructions without any user effort. Executes at instruction translation, not at run-time. Signed-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
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@ -5700,6 +5700,230 @@ instr_verify(struct rte_swx_pipeline *p __rte_unused,
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return 0;
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}
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static int
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instr_pattern_extract_many_detect(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr,
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uint32_t *n_pattern_instr)
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{
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uint32_t i;
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for (i = 0; i < n_instr; i++) {
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if (data[i].invalid)
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break;
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if (instr[i].type != INSTR_HDR_EXTRACT)
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break;
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if (i == RTE_DIM(instr->io.hdr.header_id))
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break;
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if (i && data[i].n_users)
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break;
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}
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if (i < 2)
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return 0;
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*n_pattern_instr = i;
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return 1;
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}
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static void
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instr_pattern_extract_many_optimize(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr)
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{
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uint32_t i;
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for (i = 1; i < n_instr; i++) {
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instr[0].type++;
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instr[0].io.hdr.header_id[i] = instr[i].io.hdr.header_id[0];
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instr[0].io.hdr.struct_id[i] = instr[i].io.hdr.struct_id[0];
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instr[0].io.hdr.n_bytes[i] = instr[i].io.hdr.n_bytes[0];
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data[i].invalid = 1;
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}
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}
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static int
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instr_pattern_emit_many_tx_detect(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr,
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uint32_t *n_pattern_instr)
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{
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uint32_t i;
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for (i = 0; i < n_instr; i++) {
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if (data[i].invalid)
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break;
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if (instr[i].type != INSTR_HDR_EMIT)
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break;
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if (i == RTE_DIM(instr->io.hdr.header_id))
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break;
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if (i && data[i].n_users)
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break;
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}
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if (!i)
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return 0;
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if (instr[i].type != INSTR_TX)
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return 0;
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i++;
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*n_pattern_instr = i;
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return 1;
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}
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static void
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instr_pattern_emit_many_tx_optimize(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr)
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{
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uint32_t i;
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/* Any emit instruction in addition to the first one. */
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for (i = 1; i < n_instr - 1; i++) {
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instr[0].type++;
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instr[0].io.hdr.header_id[i] = instr[i].io.hdr.header_id[0];
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instr[0].io.hdr.struct_id[i] = instr[i].io.hdr.struct_id[0];
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instr[0].io.hdr.n_bytes[i] = instr[i].io.hdr.n_bytes[0];
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data[i].invalid = 1;
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}
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/* The TX instruction is the last one in the pattern. */
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instr[0].type++;
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instr[0].io.io.offset = instr[i].io.io.offset;
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instr[0].io.io.n_bits = instr[i].io.io.n_bits;
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data[i].invalid = 1;
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}
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static int
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instr_pattern_dma_many_detect(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr,
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uint32_t *n_pattern_instr)
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{
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uint32_t i;
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for (i = 0; i < n_instr; i++) {
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if (data[i].invalid)
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break;
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if (instr[i].type != INSTR_DMA_HT)
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break;
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if (i == RTE_DIM(instr->dma.dst.header_id))
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break;
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if (i && data[i].n_users)
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break;
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}
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if (i < 2)
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return 0;
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*n_pattern_instr = i;
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return 1;
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}
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static void
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instr_pattern_dma_many_optimize(struct instruction *instr,
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struct instruction_data *data,
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uint32_t n_instr)
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{
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uint32_t i;
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for (i = 1; i < n_instr; i++) {
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instr[0].type++;
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instr[0].dma.dst.header_id[i] = instr[i].dma.dst.header_id[0];
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instr[0].dma.dst.struct_id[i] = instr[i].dma.dst.struct_id[0];
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instr[0].dma.src.offset[i] = instr[i].dma.src.offset[0];
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instr[0].dma.n_bytes[i] = instr[i].dma.n_bytes[0];
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data[i].invalid = 1;
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}
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}
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static uint32_t
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instr_optimize(struct instruction *instructions,
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struct instruction_data *instruction_data,
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uint32_t n_instructions)
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{
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uint32_t i, pos = 0;
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for (i = 0; i < n_instructions; ) {
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struct instruction *instr = &instructions[i];
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struct instruction_data *data = &instruction_data[i];
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uint32_t n_instr = 0;
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int detected;
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/* Extract many. */
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detected = instr_pattern_extract_many_detect(instr,
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data,
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n_instructions - i,
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&n_instr);
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if (detected) {
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instr_pattern_extract_many_optimize(instr,
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data,
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n_instr);
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i += n_instr;
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continue;
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}
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/* Emit many + TX. */
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detected = instr_pattern_emit_many_tx_detect(instr,
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data,
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n_instructions - i,
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&n_instr);
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if (detected) {
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instr_pattern_emit_many_tx_optimize(instr,
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data,
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n_instr);
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i += n_instr;
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continue;
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}
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/* DMA many. */
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detected = instr_pattern_dma_many_detect(instr,
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data,
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n_instructions - i,
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&n_instr);
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if (detected) {
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instr_pattern_dma_many_optimize(instr, data, n_instr);
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i += n_instr;
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continue;
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}
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/* No pattern starting at the current instruction. */
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i++;
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}
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/* Eliminate the invalid instructions that have been optimized out. */
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for (i = 0; i < n_instructions; i++) {
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struct instruction *instr = &instructions[i];
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struct instruction_data *data = &instruction_data[i];
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if (data->invalid)
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continue;
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if (i != pos) {
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memcpy(&instructions[pos], instr, sizeof(*instr));
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memcpy(&instruction_data[pos], data, sizeof(*data));
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}
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pos++;
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}
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return pos;
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}
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static int
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instruction_config(struct rte_swx_pipeline *p,
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struct action *a,
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@ -5752,6 +5976,8 @@ instruction_config(struct rte_swx_pipeline *p,
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if (err)
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goto error;
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n_instructions = instr_optimize(instr, data, n_instructions);
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err = instr_jmp_resolve(instr, data, n_instructions);
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if (err)
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goto error;
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