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net/cnxk: support clock read

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Patch implements read raw clock operation for cn9k and
cn10k.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
This commit is contained in:
Sunil Kumar Kori 2021-06-23 10:16:59 +05:30 committed by Jerin Jacob
parent 677fb66bde
commit 3199a7f6a3
4 changed files with 21 additions and 0 deletions
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2
doc/guides/nics/features/cnxk.ini
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@ -32,6 +32,8 @@ L4 checksum offload = Y
Inner L3 checksum = Y Inner L3 checksum = Y
Inner L4 checksum = Y Inner L4 checksum = Y
Packet type parsing = Y Packet type parsing = Y
Timesync = Y
Timestamp offload = Y
Basic stats = Y Basic stats = Y
Stats per queue = Y Stats per queue = Y
Extended stats = Y Extended stats = Y

1
drivers/net/cnxk/cnxk_ethdev.c
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@ -1265,6 +1265,7 @@ struct eth_dev_ops cnxk_eth_dev_ops = {
.timesync_read_time = cnxk_nix_timesync_read_time, .timesync_read_time = cnxk_nix_timesync_read_time,
.timesync_write_time = cnxk_nix_timesync_write_time, .timesync_write_time = cnxk_nix_timesync_write_time,
.timesync_adjust_time = cnxk_nix_timesync_adjust_time, .timesync_adjust_time = cnxk_nix_timesync_adjust_time,
.read_clock = cnxk_nix_read_clock,
}; };
static int static int

1
drivers/net/cnxk/cnxk_ethdev.h
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@ -323,6 +323,7 @@ int cnxk_nix_timesync_write_time(struct rte_eth_dev *eth_dev,
const struct timespec *ts); const struct timespec *ts);
int cnxk_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta); int cnxk_nix_timesync_adjust_time(struct rte_eth_dev *eth_dev, int64_t delta);
int cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev); int cnxk_nix_tsc_convert(struct cnxk_eth_dev *dev);
int cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock);
uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev); uint64_t cnxk_nix_rxq_mbuf_setup(struct cnxk_eth_dev *dev);

17
drivers/net/cnxk/cnxk_ptp.c
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@ -4,6 +4,23 @@
#include "cnxk_ethdev.h" #include "cnxk_ethdev.h"
int
cnxk_nix_read_clock(struct rte_eth_dev *eth_dev, uint64_t *clock)
{
struct cnxk_eth_dev *dev = cnxk_eth_pmd_priv(eth_dev);
/* This API returns the raw PTP HI clock value. Since LFs do not
* have direct access to PTP registers and it requires mbox msg
* to AF for this value. In fastpath reading this value for every
* packet (which involes mbox call) becomes very expensive, hence
* we should be able to derive PTP HI clock value from tsc by
* using freq_mult and clk_delta calculated during configure stage.
*/
*clock = (rte_get_tsc_cycles() + dev->clk_delta) * dev->clk_freq_mult;
return 0;
}
/* This function calculates two parameters "clk_freq_mult" and /* This function calculates two parameters "clk_freq_mult" and
* "clk_delta" which is useful in deriving PTP HI clock from * "clk_delta" which is useful in deriving PTP HI clock from
* timestamp counter (tsc) value. * timestamp counter (tsc) value.