net/mlx4: remove soft counters compilation option
Software counters are mandatory since hardware counters are not implemented. Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
This commit is contained in:
Adrien Mazarguil
Ferruh Yigit
parent
863f34f710
commit
31a76ab0df
@ -218,7 +218,6 @@ CONFIG_RTE_LIBRTE_MLX4_DEBUG_BROKEN_VERBS=n
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CONFIG_RTE_LIBRTE_MLX4_SGE_WR_N=4
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CONFIG_RTE_LIBRTE_MLX4_MAX_INLINE=0
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CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE=8
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CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS=1
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#
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# Compile burst-oriented Mellanox ConnectX-4 & ConnectX-5 (MLX5) PMD
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@ -97,7 +97,6 @@ Limitations
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- RSS RETA cannot be configured
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- RSS always includes L3 (IPv4/IPv6) and L4 (UDP/TCP). They cannot be
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dissociated.
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- Hardware counters are not implemented (they are software counters).
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Configuration
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-------------
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@ -145,11 +144,6 @@ These options can be modified in the ``.config`` file.
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This value is always 1 for RX queues since they use a single MP.
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- ``CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS`` (default **1**)
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Toggle software counters. No counters are available if this option is
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disabled since hardware counters are not supported.
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Environment variables
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~~~~~~~~~~~~~~~~~~~~~
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@ -80,10 +80,6 @@ ifdef CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE
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CFLAGS += -DMLX4_PMD_TX_MP_CACHE=$(CONFIG_RTE_LIBRTE_MLX4_TX_MP_CACHE)
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endif
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ifdef CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS
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CFLAGS += -DMLX4_PMD_SOFT_COUNTERS=$(CONFIG_RTE_LIBRTE_MLX4_SOFT_COUNTERS)
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endif
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ifeq ($(CONFIG_RTE_LIBRTE_MLX4_DEBUG_BROKEN_VERBS),y)
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CFLAGS += -DMLX4_PMD_DEBUG_BROKEN_VERBS
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endif
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@ -34,7 +34,6 @@
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/*
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* Known limitations:
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* - RSS hash key and options cannot be modified.
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* - Hardware counters aren't implemented.
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*/
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/* System headers. */
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@ -1372,9 +1371,7 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
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struct txq_elt *elt_next = &(*txq->elts)[elts_head_next];
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struct txq_elt *elt = &(*txq->elts)[elts_head];
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unsigned int segs = NB_SEGS(buf);
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#ifdef MLX4_PMD_SOFT_COUNTERS
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unsigned int sent_size = 0;
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#endif
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uint32_t send_flags = 0;
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/* Clean up old buffer. */
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@ -1452,9 +1449,7 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
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send_flags);
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if (unlikely(err))
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goto stop;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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sent_size += length;
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#endif
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} else {
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#if MLX4_PMD_SGE_WR_N > 1
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struct ibv_sge sges[MLX4_PMD_SGE_WR_N];
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@ -1473,9 +1468,7 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
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send_flags);
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if (unlikely(err))
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goto stop;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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sent_size += ret.length;
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#endif
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#else /* MLX4_PMD_SGE_WR_N > 1 */
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DEBUG("%p: TX scattered buffers support not"
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" compiled in", (void *)txq);
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@ -1483,19 +1476,15 @@ mlx4_tx_burst(void *dpdk_txq, struct rte_mbuf **pkts, uint16_t pkts_n)
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#endif /* MLX4_PMD_SGE_WR_N > 1 */
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}
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elts_head = elts_head_next;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increment sent bytes counter. */
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txq->stats.obytes += sent_size;
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#endif
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}
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stop:
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/* Take a shortcut if nothing must be sent. */
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if (unlikely(i == 0))
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return 0;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increment sent packets counter. */
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txq->stats.opackets += i;
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#endif
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/* Ring QP doorbell. */
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err = txq->if_qp->send_flush(txq->qp);
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if (unlikely(err)) {
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@ -2786,10 +2775,8 @@ mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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" completion status (%d): %s",
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(void *)rxq, wc.wr_id, wc.status,
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ibv_wc_status_str(wc.status));
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increment dropped packets counter. */
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++rxq->stats.idropped;
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#endif
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/* Link completed WRs together for repost. */
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*next = wr;
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next = &wr->next;
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@ -2901,10 +2888,8 @@ mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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/* Return packet. */
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*(pkts++) = pkt_buf;
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++pkts_ret;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increase bytes counter. */
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rxq->stats.ibytes += pkt_buf_len;
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#endif
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repost:
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if (++elts_head >= elts_n)
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elts_head = 0;
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@ -2924,10 +2909,8 @@ mlx4_rx_burst_sp(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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abort();
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}
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rxq->elts_head = elts_head;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increase packets counter. */
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rxq->stats.ipackets += pkts_ret;
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#endif
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return pkts_ret;
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}
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@ -3008,10 +2991,8 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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" completion status (%d): %s",
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(void *)rxq, wc.wr_id, wc.status,
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ibv_wc_status_str(wc.status));
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increment dropped packets counter. */
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++rxq->stats.idropped;
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#endif
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/* Add SGE to array for repost. */
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sges[i] = elt->sge;
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goto repost;
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@ -3062,10 +3043,8 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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/* Return packet. */
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*(pkts++) = seg;
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++pkts_ret;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increase bytes counter. */
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rxq->stats.ibytes += len;
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#endif
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repost:
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if (++elts_head >= elts_n)
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elts_head = 0;
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@ -3083,10 +3062,8 @@ mlx4_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
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abort();
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}
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rxq->elts_head = elts_head;
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#ifdef MLX4_PMD_SOFT_COUNTERS
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/* Increase packets counter. */
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rxq->stats.ipackets += pkts_ret;
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#endif
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return pkts_ret;
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}
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@ -4270,17 +4247,13 @@ mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
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continue;
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idx = rxq->stats.idx;
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if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
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#ifdef MLX4_PMD_SOFT_COUNTERS
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tmp.q_ipackets[idx] += rxq->stats.ipackets;
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tmp.q_ibytes[idx] += rxq->stats.ibytes;
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#endif
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tmp.q_errors[idx] += (rxq->stats.idropped +
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rxq->stats.rx_nombuf);
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}
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#ifdef MLX4_PMD_SOFT_COUNTERS
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tmp.ipackets += rxq->stats.ipackets;
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tmp.ibytes += rxq->stats.ibytes;
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#endif
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tmp.ierrors += rxq->stats.idropped;
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tmp.rx_nombuf += rxq->stats.rx_nombuf;
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}
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@ -4291,21 +4264,14 @@ mlx4_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
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continue;
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idx = txq->stats.idx;
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if (idx < RTE_ETHDEV_QUEUE_STAT_CNTRS) {
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#ifdef MLX4_PMD_SOFT_COUNTERS
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tmp.q_opackets[idx] += txq->stats.opackets;
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tmp.q_obytes[idx] += txq->stats.obytes;
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#endif
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tmp.q_errors[idx] += txq->stats.odropped;
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}
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#ifdef MLX4_PMD_SOFT_COUNTERS
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tmp.opackets += txq->stats.opackets;
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tmp.obytes += txq->stats.obytes;
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#endif
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tmp.oerrors += txq->stats.odropped;
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}
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#ifndef MLX4_PMD_SOFT_COUNTERS
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/* FIXME: retrieve and add hardware counters. */
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#endif
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*stats = tmp;
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priv_unlock(priv);
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}
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@ -4340,9 +4306,6 @@ mlx4_stats_reset(struct rte_eth_dev *dev)
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(*priv->txqs)[i]->stats =
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(struct mlx4_txq_stats){ .idx = idx };
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}
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#ifndef MLX4_PMD_SOFT_COUNTERS
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/* FIXME: reset hardware counters. */
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#endif
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priv_unlock(priv);
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}
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@ -101,14 +101,6 @@
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#define MLX4_PMD_TX_MP_CACHE 8
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#endif
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/*
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* If defined, only use software counters. The PMD will never ask the hardware
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* for these, and many of them won't be available.
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*/
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#ifndef MLX4_PMD_SOFT_COUNTERS
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#define MLX4_PMD_SOFT_COUNTERS 1
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#endif
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/* Alarm timeout. */
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#define MLX4_ALARM_TIMEOUT_US 100000
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@ -186,10 +178,8 @@ enum {
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struct mlx4_rxq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t ipackets; /**< Total of successfully received packets. */
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uint64_t ibytes; /**< Total of successfully received bytes. */
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#endif
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uint64_t idropped; /**< Total of packets dropped when RX ring full. */
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uint64_t rx_nombuf; /**< Total of RX mbuf allocation failures. */
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};
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@ -252,10 +242,8 @@ struct txq_elt {
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struct mlx4_txq_stats {
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unsigned int idx; /**< Mapping index. */
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#ifdef MLX4_PMD_SOFT_COUNTERS
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uint64_t opackets; /**< Total of successfully sent packets. */
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uint64_t obytes; /**< Total of successfully sent bytes. */
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#endif
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uint64_t odropped; /**< Total of packets not sent when TX ring full. */
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};
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