event/octeontx: support linking queues to ports

queues to port link and unlink establishment is through
setting/resetting the queue/group membership in
SSOW_VHWS_GRPMSK_CHGX

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: Gage Eads <gage.eads@intel.com>
This commit is contained in:
Jerin Jacob 2017-03-03 22:57:56 +05:30
parent 708bac973a
commit 35a228ac50
2 changed files with 50 additions and 0 deletions

View File

@ -260,6 +260,46 @@ ssovf_port_setup(struct rte_eventdev *dev, uint8_t port_id,
ssovf_log_dbg("port=%d ws=%p", port_id, ws);
return 0;
}
static int
ssovf_port_link(struct rte_eventdev *dev, void *port, const uint8_t queues[],
const uint8_t priorities[], uint16_t nb_links)
{
uint16_t link;
uint64_t val;
struct ssows *ws = port;
ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_links);
RTE_SET_USED(dev);
RTE_SET_USED(priorities);
for (link = 0; link < nb_links; link++) {
val = queues[link];
val |= (1ULL << 24); /* Set membership */
ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
}
return (int)nb_links;
}
static int
ssovf_port_unlink(struct rte_eventdev *dev, void *port, uint8_t queues[],
uint16_t nb_unlinks)
{
uint16_t unlink;
uint64_t val;
struct ssows *ws = port;
ssovf_func_trace("port=%d nb_links=%d", ws->port, nb_unlinks);
RTE_SET_USED(dev);
for (unlink = 0; unlink < nb_unlinks; unlink++) {
val = queues[unlink];
val &= ~(1ULL << 24); /* Clear membership */
ssovf_write64(val, ws->base + SSOW_VHWS_GRPMSK_CHGX(0));
}
return (int)nb_unlinks;
}
/* Initialize and register event driver with DPDK Application */
static const struct rte_eventdev_ops ssovf_ops = {
.dev_infos_get = ssovf_info_get,
@ -270,6 +310,8 @@ static const struct rte_eventdev_ops ssovf_ops = {
.port_def_conf = ssovf_port_def_conf,
.port_setup = ssovf_port_setup,
.port_release = ssovf_port_release,
.port_link = ssovf_port_link,
.port_unlink = ssovf_port_unlink,
};
static int

View File

@ -120,6 +120,14 @@
#define SSO_GRP_GET_PRIORITY 0x7
#define SSO_GRP_SET_PRIORITY 0x8
/*
* In Cavium OcteonTX SoC, all accesses to the device registers are
* implictly strongly ordered. So, The relaxed version of IO operation is
* safe to use with out any IO memory barriers.
*/
#define ssovf_read64 rte_read64_relaxed
#define ssovf_write64 rte_write64_relaxed
struct ssovf_evdev {
uint8_t max_event_queues;
uint8_t max_event_ports;