net/mlx5: update prerequisites for upcoming enhancements
The latest version of Mellanox OFED exposes hardware definitions necessary to implement data path operation bypassing Verbs. Update the minimum version requirement to MLNX_OFED >= 3.3 and clean up compatibility checks for previous releases. Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com> Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
This commit is contained in:
Nélio Laranjeiro
Bruce Richardson
parent
0cdddf4d06
commit
36271e7446
@ -125,16 +125,6 @@ These options can be modified in the ``.config`` file.
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Environment variables
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~~~~~~~~~~~~~~~~~~~~~
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- ``MLX5_ENABLE_CQE_COMPRESSION``
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A nonzero value lets ConnectX-4 return smaller completion entries to
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improve performance when PCI backpressure is detected. It is most useful
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for scenarios involving heavy traffic on many queues.
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Since the additional software logic necessary to handle this mode can
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lower performance when there is no backpressure, it is not enabled by
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default.
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- ``MLX5_PMD_ENABLE_PADDING``
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Enables HW packet padding in PCI bus transactions.
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@ -211,40 +201,12 @@ DPDK and must be installed separately:
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Currently supported by DPDK:
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- Mellanox OFED **3.1-1.0.3**, **3.1-1.5.7.1** or **3.2-2.0.0.0** depending
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on usage.
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The following features are supported with version **3.1-1.5.7.1** and
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above only:
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- IPv6, UPDv6, TCPv6 RSS.
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- RX checksum offloads.
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- IBM POWER8.
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The following features are supported with version **3.2-2.0.0.0** and
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above only:
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- Flow director.
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- RX VLAN stripping.
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- TX VLAN insertion.
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- RX CRC stripping configuration.
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- Mellanox OFED **3.3-1.0.0.0**.
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- Minimum firmware version:
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With MLNX_OFED **3.1-1.0.3**:
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- ConnectX-4: **12.12.1240**
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- ConnectX-4 Lx: **14.12.1100**
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With MLNX_OFED **3.1-1.5.7.1**:
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- ConnectX-4: **12.13.0144**
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- ConnectX-4 Lx: **14.13.0144**
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With MLNX_OFED **3.2-2.0.0.0**:
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- ConnectX-4: **12.14.2036**
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- ConnectX-4 Lx: **14.14.2036**
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- ConnectX-4: **12.16.1006**
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- ConnectX-4 Lx: **14.16.1006**
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Getting Mellanox OFED
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~~~~~~~~~~~~~~~~~~~~~
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@ -105,44 +105,21 @@ mlx5_autoconf.h.new: FORCE
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mlx5_autoconf.h.new: $(RTE_SDK)/scripts/auto-config-h.sh
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$Q $(RM) -f -- '$@'
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$Q sh -- '$<' '$@' \
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HAVE_EXP_QUERY_DEVICE \
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infiniband/verbs.h \
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type 'struct ibv_exp_device_attr' $(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_FLOW_SPEC_IPV6 \
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infiniband/verbs.h \
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type 'struct ibv_exp_flow_spec_ipv6' $(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR \
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infiniband/verbs.h \
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enum IBV_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS \
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infiniband/verbs.h \
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enum IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_EXP_CQ_RX_TCP_PACKET \
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infiniband/verbs.h \
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enum IBV_EXP_CQ_RX_TCP_PACKET \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_VERBS_FCS \
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infiniband/verbs.h \
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enum IBV_EXP_CREATE_WQ_FLAG_SCATTER_FCS \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_VERBS_RX_END_PADDING \
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infiniband/verbs.h \
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enum IBV_EXP_CREATE_WQ_FLAG_RX_END_PADDING \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_VERBS_VLAN_INSERTION \
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infiniband/verbs.h \
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enum IBV_EXP_RECEIVE_WQ_CVLAN_INSERTION \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_VERBS_IBV_EXP_CQ_COMPRESSED_CQE \
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infiniband/verbs_exp.h \
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enum IBV_EXP_CQ_COMPRESSED_CQE \
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$(AUTOCONF_OUTPUT)
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$Q sh -- '$<' '$@' \
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HAVE_VERBS_MLX5_ETH_VLAN_INLINE_HEADER_SIZE \
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infiniband/mlx5_hw.h \
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enum MLX5_ETH_VLAN_INLINE_HEADER_SIZE \
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$(AUTOCONF_OUTPUT)
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# Create mlx5_autoconf.h or update it in case it differs from the new one.
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@ -195,17 +195,13 @@ static const struct eth_dev_ops mlx5_dev_ops = {
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.mac_addr_add = mlx5_mac_addr_add,
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.mac_addr_set = mlx5_mac_addr_set,
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.mtu_set = mlx5_dev_set_mtu,
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#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
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.vlan_strip_queue_set = mlx5_vlan_strip_queue_set,
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.vlan_offload_set = mlx5_vlan_offload_set,
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#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
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.reta_update = mlx5_dev_rss_reta_update,
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.reta_query = mlx5_dev_rss_reta_query,
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.rss_hash_update = mlx5_rss_hash_update,
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.rss_hash_conf_get = mlx5_rss_hash_conf_get,
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#ifdef MLX5_FDIR_SUPPORT
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.filter_ctrl = mlx5_dev_filter_ctrl,
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#endif /* MLX5_FDIR_SUPPORT */
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};
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static struct {
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@ -352,24 +348,16 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
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struct ibv_pd *pd = NULL;
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struct priv *priv = NULL;
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struct rte_eth_dev *eth_dev;
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#ifdef HAVE_EXP_QUERY_DEVICE
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struct ibv_exp_device_attr exp_device_attr;
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#endif /* HAVE_EXP_QUERY_DEVICE */
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struct ether_addr mac;
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uint16_t num_vfs = 0;
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#ifdef HAVE_EXP_QUERY_DEVICE
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exp_device_attr.comp_mask =
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IBV_EXP_DEVICE_ATTR_EXP_CAP_FLAGS |
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IBV_EXP_DEVICE_ATTR_RX_HASH |
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#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
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IBV_EXP_DEVICE_ATTR_VLAN_OFFLOADS |
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#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
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#ifdef HAVE_VERBS_RX_END_PADDING
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IBV_EXP_DEVICE_ATTR_RX_PAD_END_ALIGN |
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#endif /* HAVE_VERBS_RX_END_PADDING */
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0;
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#endif /* HAVE_EXP_QUERY_DEVICE */
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DEBUG("using port %u (%08" PRIx32 ")", port, test);
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@ -420,7 +408,6 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
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priv->port = port;
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priv->pd = pd;
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priv->mtu = ETHER_MTU;
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#ifdef HAVE_EXP_QUERY_DEVICE
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if (ibv_exp_query_device(ctx, &exp_device_attr)) {
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ERROR("ibv_exp_query_device() failed");
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goto port_error;
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@ -446,30 +433,20 @@ mlx5_pci_devinit(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)
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priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
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DEBUG("maximum RX indirection table size is %u",
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priv->ind_table_max_size);
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#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
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priv->hw_vlan_strip = !!(exp_device_attr.wq_vlan_offloads_cap &
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IBV_EXP_RECEIVE_WQ_CVLAN_STRIP);
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#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
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DEBUG("VLAN stripping is %ssupported",
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(priv->hw_vlan_strip ? "" : "not "));
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#ifdef HAVE_VERBS_FCS
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priv->hw_fcs_strip = !!(exp_device_attr.exp_device_cap_flags &
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IBV_EXP_DEVICE_SCATTER_FCS);
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#endif /* HAVE_VERBS_FCS */
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DEBUG("FCS stripping configuration is %ssupported",
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(priv->hw_fcs_strip ? "" : "not "));
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#ifdef HAVE_VERBS_RX_END_PADDING
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priv->hw_padding = !!exp_device_attr.rx_pad_end_addr_align;
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#endif /* HAVE_VERBS_RX_END_PADDING */
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DEBUG("hardware RX end alignment padding is %ssupported",
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(priv->hw_padding ? "" : "not "));
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#else /* HAVE_EXP_QUERY_DEVICE */
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priv->ind_table_max_size = RSS_INDIRECTION_TABLE_SIZE;
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#endif /* HAVE_EXP_QUERY_DEVICE */
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priv_get_num_vfs(priv, &num_vfs);
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priv->sriov = (num_vfs || sriov);
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priv->mps = mps;
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@ -68,6 +68,11 @@
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#include "mlx5_autoconf.h"
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#include "mlx5_defs.h"
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#if !defined(HAVE_VERBS_IBV_EXP_CQ_COMPRESSED_CQE) || \
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!defined(HAVE_VERBS_MLX5_ETH_VLAN_INLINE_HEADER_SIZE)
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#error Mellanox OFED >= 3.3 is required, please refer to the documentation.
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#endif
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enum {
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PCI_VENDOR_ID_MELLANOX = 0x15b3,
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};
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@ -76,13 +76,4 @@
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/* Alarm timeout. */
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#define MLX5_ALARM_TIMEOUT_US 100000
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/*
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* Extended flow priorities necessary to support flow director are available
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* since MLNX_OFED 3.2. Considering this version adds support for VLAN
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* offloads as well, their availability means flow director can be used.
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*/
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#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
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#define MLX5_FDIR_SUPPORT 1
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#endif
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#endif /* RTE_PMD_MLX5_DEFS_H_ */
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@ -122,7 +122,6 @@ fdir_filter_to_flow_desc(const struct rte_eth_fdir_filter *fdir_filter,
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case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
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desc->type = HASH_RXQ_IPV4;
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break;
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#ifdef HAVE_FLOW_SPEC_IPV6
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case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
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desc->type = HASH_RXQ_UDPV6;
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break;
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@ -132,7 +131,6 @@ fdir_filter_to_flow_desc(const struct rte_eth_fdir_filter *fdir_filter,
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case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
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desc->type = HASH_RXQ_IPV6;
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break;
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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default:
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break;
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}
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@ -147,7 +145,6 @@ fdir_filter_to_flow_desc(const struct rte_eth_fdir_filter *fdir_filter,
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desc->src_ip[0] = fdir_filter->input.flow.ip4_flow.src_ip;
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desc->dst_ip[0] = fdir_filter->input.flow.ip4_flow.dst_ip;
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break;
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#ifdef HAVE_FLOW_SPEC_IPV6
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case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
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case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
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desc->src_port = fdir_filter->input.flow.udp6_flow.src_port;
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@ -161,7 +158,6 @@ fdir_filter_to_flow_desc(const struct rte_eth_fdir_filter *fdir_filter,
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fdir_filter->input.flow.ipv6_flow.dst_ip,
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sizeof(desc->dst_ip));
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break;
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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default:
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break;
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}
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@ -211,7 +207,6 @@ priv_fdir_overlap(const struct priv *priv,
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(desc2->dst_ip[0] & mask->ipv4_mask.dst_ip)))
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return 0;
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break;
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#ifdef HAVE_FLOW_SPEC_IPV6
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case HASH_RXQ_IPV6:
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case HASH_RXQ_UDPV6:
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case HASH_RXQ_TCPV6:
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@ -222,7 +217,6 @@ priv_fdir_overlap(const struct priv *priv,
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(desc2->dst_ip[i] & mask->ipv6_mask.dst_ip[i])))
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return 0;
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break;
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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default:
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break;
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}
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@ -258,9 +252,7 @@ priv_fdir_flow_add(struct priv *priv,
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uintptr_t spec_offset = (uintptr_t)&data->spec;
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struct ibv_exp_flow_spec_eth *spec_eth;
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struct ibv_exp_flow_spec_ipv4 *spec_ipv4;
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#ifdef HAVE_FLOW_SPEC_IPV6
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struct ibv_exp_flow_spec_ipv6 *spec_ipv6;
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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struct ibv_exp_flow_spec_tcp_udp *spec_tcp_udp;
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struct mlx5_fdir_filter *iter_fdir_filter;
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unsigned int i;
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@ -334,7 +326,6 @@ priv_fdir_flow_add(struct priv *priv,
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spec_offset += spec_ipv4->size;
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break;
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#ifdef HAVE_FLOW_SPEC_IPV6
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case HASH_RXQ_IPV6:
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case HASH_RXQ_UDPV6:
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case HASH_RXQ_TCPV6:
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@ -368,7 +359,6 @@ priv_fdir_flow_add(struct priv *priv,
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spec_offset += spec_ipv6->size;
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break;
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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default:
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ERROR("invalid flow attribute type");
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return EINVAL;
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@ -67,11 +67,9 @@ static const struct special_flow_init special_flow_init[] = {
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1 << HASH_RXQ_TCPV4 |
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1 << HASH_RXQ_UDPV4 |
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1 << HASH_RXQ_IPV4 |
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#ifdef HAVE_FLOW_SPEC_IPV6
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1 << HASH_RXQ_TCPV6 |
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1 << HASH_RXQ_UDPV6 |
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1 << HASH_RXQ_IPV6 |
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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1 << HASH_RXQ_ETH |
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0,
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.per_vlan = 0,
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@ -82,10 +80,8 @@ static const struct special_flow_init special_flow_init[] = {
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.hash_types =
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1 << HASH_RXQ_UDPV4 |
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1 << HASH_RXQ_IPV4 |
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#ifdef HAVE_FLOW_SPEC_IPV6
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1 << HASH_RXQ_UDPV6 |
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1 << HASH_RXQ_IPV6 |
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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1 << HASH_RXQ_ETH |
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0,
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.per_vlan = 0,
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@ -96,15 +92,12 @@ static const struct special_flow_init special_flow_init[] = {
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.hash_types =
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1 << HASH_RXQ_UDPV4 |
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1 << HASH_RXQ_IPV4 |
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#ifdef HAVE_FLOW_SPEC_IPV6
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1 << HASH_RXQ_UDPV6 |
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1 << HASH_RXQ_IPV6 |
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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1 << HASH_RXQ_ETH |
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0,
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.per_vlan = 1,
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},
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#ifdef HAVE_FLOW_SPEC_IPV6
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[HASH_RXQ_FLOW_TYPE_IPV6MULTI] = {
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.dst_mac_val = "\x33\x33\x00\x00\x00\x00",
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.dst_mac_mask = "\xff\xff\x00\x00\x00\x00",
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@ -115,7 +108,6 @@ static const struct special_flow_init special_flow_init[] = {
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0,
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.per_vlan = 1,
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},
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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};
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/**
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@ -105,7 +105,6 @@ const struct hash_rxq_init hash_rxq_init[] = {
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},
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.underlayer = &hash_rxq_init[HASH_RXQ_ETH],
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},
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#ifdef HAVE_FLOW_SPEC_IPV6
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[HASH_RXQ_TCPV6] = {
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.hash_fields = (IBV_EXP_RX_HASH_SRC_IPV6 |
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IBV_EXP_RX_HASH_DST_IPV6 |
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@ -144,7 +143,6 @@ const struct hash_rxq_init hash_rxq_init[] = {
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},
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.underlayer = &hash_rxq_init[HASH_RXQ_ETH],
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},
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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[HASH_RXQ_ETH] = {
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.hash_fields = 0,
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.dpdk_rss_hf = 0,
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@ -168,17 +166,11 @@ static const struct ind_table_init ind_table_init[] = {
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1 << HASH_RXQ_TCPV4 |
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1 << HASH_RXQ_UDPV4 |
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1 << HASH_RXQ_IPV4 |
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#ifdef HAVE_FLOW_SPEC_IPV6
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1 << HASH_RXQ_TCPV6 |
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1 << HASH_RXQ_UDPV6 |
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1 << HASH_RXQ_IPV6 |
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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0,
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#ifdef HAVE_FLOW_SPEC_IPV6
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.hash_types_n = 6,
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#else /* HAVE_FLOW_SPEC_IPV6 */
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.hash_types_n = 3,
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#endif /* HAVE_FLOW_SPEC_IPV6 */
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},
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{
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.max_size = 1,
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@ -243,12 +235,8 @@ priv_flow_attr(struct priv *priv, struct ibv_exp_flow_attr *flow_attr,
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init = &hash_rxq_init[type];
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*flow_attr = (struct ibv_exp_flow_attr){
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.type = IBV_EXP_FLOW_ATTR_NORMAL,
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#ifdef MLX5_FDIR_SUPPORT
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/* Priorities < 3 are reserved for flow director. */
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.priority = init->flow_priority + 3,
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#else /* MLX5_FDIR_SUPPORT */
|
||||
.priority = init->flow_priority,
|
||||
#endif /* MLX5_FDIR_SUPPORT */
|
||||
.num_of_specs = 0,
|
||||
.port = priv->port,
|
||||
.flags = 0,
|
||||
@ -589,9 +577,7 @@ priv_allow_flow_type(struct priv *priv, enum hash_rxq_flow_type type)
|
||||
case HASH_RXQ_FLOW_TYPE_ALLMULTI:
|
||||
return !!priv->allmulti_req;
|
||||
case HASH_RXQ_FLOW_TYPE_BROADCAST:
|
||||
#ifdef HAVE_FLOW_SPEC_IPV6
|
||||
case HASH_RXQ_FLOW_TYPE_IPV6MULTI:
|
||||
#endif /* HAVE_FLOW_SPEC_IPV6 */
|
||||
/* If allmulti is enabled, broadcast and ipv6multi
|
||||
* are unnecessary. */
|
||||
return !priv->allmulti_req;
|
||||
@ -1040,19 +1026,13 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl, uint16_t desc,
|
||||
.cq = tmpl.rxq.cq,
|
||||
.comp_mask =
|
||||
IBV_EXP_CREATE_WQ_RES_DOMAIN |
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
IBV_EXP_CREATE_WQ_VLAN_OFFLOADS |
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
0,
|
||||
.res_domain = tmpl.rd,
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
.vlan_offloads = (tmpl.rxq.vlan_strip ?
|
||||
IBV_EXP_RECEIVE_WQ_CVLAN_STRIP :
|
||||
0),
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
};
|
||||
|
||||
#ifdef HAVE_VERBS_FCS
|
||||
/* By default, FCS (CRC) is stripped by hardware. */
|
||||
if (dev->data->dev_conf.rxmode.hw_strip_crc) {
|
||||
tmpl.rxq.crc_present = 0;
|
||||
@ -1073,9 +1053,6 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl, uint16_t desc,
|
||||
(void *)dev,
|
||||
tmpl.rxq.crc_present ? "disabled" : "enabled",
|
||||
tmpl.rxq.crc_present << 2);
|
||||
#endif /* HAVE_VERBS_FCS */
|
||||
|
||||
#ifdef HAVE_VERBS_RX_END_PADDING
|
||||
if (!mlx5_getenv_int("MLX5_PMD_ENABLE_PADDING"))
|
||||
; /* Nothing else to do. */
|
||||
else if (priv->hw_padding) {
|
||||
@ -1088,7 +1065,6 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl, uint16_t desc,
|
||||
" supported, make sure MLNX_OFED and firmware are"
|
||||
" up to date",
|
||||
(void *)dev);
|
||||
#endif /* HAVE_VERBS_RX_END_PADDING */
|
||||
|
||||
tmpl.rxq.wq = ibv_exp_create_wq(priv->ctx, &attr.wq);
|
||||
if (tmpl.rxq.wq == NULL) {
|
||||
@ -1108,9 +1084,7 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl, uint16_t desc,
|
||||
DEBUG("%p: RTE port ID: %u", (void *)rxq_ctrl, tmpl.rxq.port_id);
|
||||
attr.params = (struct ibv_exp_query_intf_params){
|
||||
.intf_scope = IBV_EXP_INTF_GLOBAL,
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
.intf_version = 1,
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
.intf = IBV_EXP_INTF_CQ,
|
||||
.obj = tmpl.rxq.cq,
|
||||
};
|
||||
@ -1166,11 +1140,7 @@ rxq_setup(struct rte_eth_dev *dev, struct rxq_ctrl *rxq_ctrl, uint16_t desc,
|
||||
DEBUG("%p: rxq updated with %p", (void *)rxq_ctrl, (void *)&tmpl);
|
||||
assert(ret == 0);
|
||||
/* Assign function in queue. */
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
rxq_ctrl->rxq.poll = rxq_ctrl->if_cq->poll_length_flags_cvlan;
|
||||
#else /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
rxq_ctrl->rxq.poll = rxq_ctrl->if_cq->poll_length_flags;
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
rxq_ctrl->rxq.recv = rxq_ctrl->if_wq->recv_burst;
|
||||
return 0;
|
||||
error:
|
||||
|
||||
@ -452,11 +452,9 @@ rxq_cq_to_ol_flags(const struct rxq *rxq, uint32_t flags)
|
||||
TRANSPOSE(~flags,
|
||||
IBV_EXP_CQ_RX_IP_CSUM_OK,
|
||||
PKT_RX_IP_CKSUM_BAD);
|
||||
#ifdef HAVE_EXP_CQ_RX_TCP_PACKET
|
||||
/* Set L4 checksum flag only for TCP/UDP packets. */
|
||||
if (flags &
|
||||
(IBV_EXP_CQ_RX_TCP_PACKET | IBV_EXP_CQ_RX_UDP_PACKET))
|
||||
#endif /* HAVE_EXP_CQ_RX_TCP_PACKET */
|
||||
ol_flags |=
|
||||
TRANSPOSE(~flags,
|
||||
IBV_EXP_CQ_RX_TCP_UDP_CSUM_OK,
|
||||
@ -589,13 +587,11 @@ mlx5_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)
|
||||
if (rxq->csum | rxq->csum_l2tun | rxq->vlan_strip) {
|
||||
seg->packet_type = rxq_cq_to_pkt_type(flags);
|
||||
seg->ol_flags = rxq_cq_to_ol_flags(rxq, flags);
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
if (flags & IBV_EXP_CQ_RX_CVLAN_STRIPPED_V1) {
|
||||
seg->ol_flags |= PKT_RX_VLAN_PKT |
|
||||
PKT_RX_VLAN_STRIPPED;
|
||||
seg->vlan_tci = vlan_tci;
|
||||
}
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
}
|
||||
/* Return packet. */
|
||||
*(pkts++) = seg;
|
||||
|
||||
@ -120,11 +120,7 @@ struct rxq_ctrl {
|
||||
struct fdir_queue fdir_queue; /* Flow director queue. */
|
||||
struct ibv_mr *mr; /* Memory Region (for mp). */
|
||||
struct ibv_exp_wq_family *if_wq; /* WQ burst interface. */
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
struct ibv_exp_cq_family_v1 *if_cq; /* CQ interface. */
|
||||
#else /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
struct ibv_exp_cq_family *if_cq; /* CQ interface. */
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
unsigned int socket; /* CPU socket ID for allocations. */
|
||||
struct rxq rxq; /* Data path structure. */
|
||||
};
|
||||
@ -134,11 +130,9 @@ enum hash_rxq_type {
|
||||
HASH_RXQ_TCPV4,
|
||||
HASH_RXQ_UDPV4,
|
||||
HASH_RXQ_IPV4,
|
||||
#ifdef HAVE_FLOW_SPEC_IPV6
|
||||
HASH_RXQ_TCPV6,
|
||||
HASH_RXQ_UDPV6,
|
||||
HASH_RXQ_IPV6,
|
||||
#endif /* HAVE_FLOW_SPEC_IPV6 */
|
||||
HASH_RXQ_ETH,
|
||||
};
|
||||
|
||||
@ -169,9 +163,7 @@ struct hash_rxq_init {
|
||||
} hdr;
|
||||
struct ibv_exp_flow_spec_tcp_udp tcp_udp;
|
||||
struct ibv_exp_flow_spec_ipv4 ipv4;
|
||||
#ifdef HAVE_FLOW_SPEC_IPV6
|
||||
struct ibv_exp_flow_spec_ipv6 ipv6;
|
||||
#endif /* HAVE_FLOW_SPEC_IPV6 */
|
||||
struct ibv_exp_flow_spec_eth eth;
|
||||
} flow_spec; /* Flow specification template. */
|
||||
const struct hash_rxq_init *underlayer; /* Pointer to underlayer. */
|
||||
|
||||
@ -376,13 +376,11 @@ txq_setup(struct rte_eth_dev *dev, struct txq_ctrl *txq_ctrl, uint16_t desc,
|
||||
#ifdef HAVE_VERBS_VLAN_INSERTION
|
||||
.intf_version = 1,
|
||||
#endif
|
||||
#ifdef HAVE_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR
|
||||
/* Enable multi-packet send if supported. */
|
||||
.family_flags =
|
||||
(priv->mps ?
|
||||
IBV_EXP_QP_BURST_CREATE_ENABLE_MULTI_PACKET_SEND_WR :
|
||||
0),
|
||||
#endif
|
||||
};
|
||||
tmpl.if_qp = ibv_exp_query_intf(priv->ctx, &attr.params, &status);
|
||||
if (tmpl.if_qp == NULL) {
|
||||
|
||||
@ -144,7 +144,6 @@ static void
|
||||
priv_vlan_strip_queue_set(struct priv *priv, uint16_t idx, int on)
|
||||
{
|
||||
struct rxq *rxq = (*priv->rxqs)[idx];
|
||||
#ifdef HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS
|
||||
struct ibv_exp_wq_attr mod;
|
||||
uint16_t vlan_offloads =
|
||||
(on ? IBV_EXP_RECEIVE_WQ_CVLAN_STRIP : 0) |
|
||||
@ -165,8 +164,6 @@ priv_vlan_strip_queue_set(struct priv *priv, uint16_t idx, int on)
|
||||
return;
|
||||
}
|
||||
|
||||
#endif /* HAVE_EXP_DEVICE_ATTR_VLAN_OFFLOADS */
|
||||
|
||||
/* Update related bits in RX queue. */
|
||||
rxq->vlan_strip = !!on;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user