net/idpf: support write back based on ITR expire
Enable write back on ITR expire, then packets can be received one by one. Signed-off-by: Beilei Xing <beilei.xing@intel.com> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
This commit is contained in:
Junfeng Guo
Thomas Monjalon
parent
99af8fe570
commit
37291a68fd
@ -297,6 +297,90 @@ idpf_dev_configure(struct rte_eth_dev *dev)
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return 0;
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}
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static int
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idpf_config_rx_queues_irqs(struct rte_eth_dev *dev)
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{
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struct idpf_vport *vport = dev->data->dev_private;
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struct idpf_adapter *adapter = vport->adapter;
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struct virtchnl2_queue_vector *qv_map;
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struct idpf_hw *hw = &adapter->hw;
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uint32_t dynctl_reg_start;
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uint32_t itrn_reg_start;
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uint32_t dynctl_val, itrn_val;
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uint16_t i;
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qv_map = rte_zmalloc("qv_map",
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dev->data->nb_rx_queues *
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sizeof(struct virtchnl2_queue_vector), 0);
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if (qv_map == NULL) {
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PMD_DRV_LOG(ERR, "Failed to allocate %d queue-vector map",
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dev->data->nb_rx_queues);
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goto qv_map_alloc_err;
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}
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/* Rx interrupt disabled, Map interrupt only for writeback */
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/* The capability flags adapter->caps->other_caps should be
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* compared with bit VIRTCHNL2_CAP_WB_ON_ITR here. The if
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* condition should be updated when the FW can return the
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* correct flag bits.
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*/
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dynctl_reg_start =
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vport->recv_vectors->vchunks.vchunks->dynctl_reg_start;
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itrn_reg_start =
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vport->recv_vectors->vchunks.vchunks->itrn_reg_start;
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dynctl_val = IDPF_READ_REG(hw, dynctl_reg_start);
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PMD_DRV_LOG(DEBUG, "Value of dynctl_reg_start is 0x%x",
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dynctl_val);
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itrn_val = IDPF_READ_REG(hw, itrn_reg_start);
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PMD_DRV_LOG(DEBUG, "Value of itrn_reg_start is 0x%x", itrn_val);
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/* Force write-backs by setting WB_ON_ITR bit in DYN_CTL
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* register. WB_ON_ITR and INTENA are mutually exclusive
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* bits. Setting WB_ON_ITR bits means TX and RX Descs
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* are written back based on ITR expiration irrespective
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* of INTENA setting.
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*/
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/* TBD: need to tune INTERVAL value for better performance. */
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if (itrn_val != 0)
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IDPF_WRITE_REG(hw,
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dynctl_reg_start,
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VIRTCHNL2_ITR_IDX_0 <<
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PF_GLINT_DYN_CTL_ITR_INDX_S |
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PF_GLINT_DYN_CTL_WB_ON_ITR_M |
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itrn_val <<
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PF_GLINT_DYN_CTL_INTERVAL_S);
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else
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IDPF_WRITE_REG(hw,
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dynctl_reg_start,
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VIRTCHNL2_ITR_IDX_0 <<
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PF_GLINT_DYN_CTL_ITR_INDX_S |
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PF_GLINT_DYN_CTL_WB_ON_ITR_M |
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IDPF_DFLT_INTERVAL <<
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PF_GLINT_DYN_CTL_INTERVAL_S);
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for (i = 0; i < dev->data->nb_rx_queues; i++) {
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/* map all queues to the same vector */
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qv_map[i].queue_id = vport->chunks_info.rx_start_qid + i;
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qv_map[i].vector_id =
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vport->recv_vectors->vchunks.vchunks->start_vector_id;
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}
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vport->qv_map = qv_map;
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if (idpf_vc_config_irq_map_unmap(vport, true) != 0) {
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PMD_DRV_LOG(ERR, "config interrupt mapping failed");
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goto config_irq_map_err;
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}
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return 0;
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config_irq_map_err:
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rte_free(vport->qv_map);
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vport->qv_map = NULL;
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qv_map_alloc_err:
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return -1;
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}
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static int
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idpf_start_queues(struct rte_eth_dev *dev)
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{
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@ -334,6 +418,10 @@ static int
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idpf_dev_start(struct rte_eth_dev *dev)
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{
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struct idpf_vport *vport = dev->data->dev_private;
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struct idpf_adapter *adapter = vport->adapter;
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uint16_t num_allocated_vectors =
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adapter->caps->num_allocated_vectors;
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uint16_t req_vecs_num;
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int ret;
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if (dev->data->mtu > vport->max_mtu) {
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@ -344,6 +432,27 @@ idpf_dev_start(struct rte_eth_dev *dev)
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vport->max_pkt_len = dev->data->mtu + IDPF_ETH_OVERHEAD;
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req_vecs_num = IDPF_DFLT_Q_VEC_NUM;
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if (req_vecs_num + adapter->used_vecs_num > num_allocated_vectors) {
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PMD_DRV_LOG(ERR, "The accumulated request vectors' number should be less than %d",
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num_allocated_vectors);
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ret = -EINVAL;
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goto err_mtu;
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}
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ret = idpf_vc_alloc_vectors(vport, req_vecs_num);
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if (ret != 0) {
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PMD_DRV_LOG(ERR, "Failed to allocate interrupt vectors");
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goto err_mtu;
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}
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adapter->used_vecs_num += req_vecs_num;
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ret = idpf_config_rx_queues_irqs(dev);
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if (ret != 0) {
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PMD_DRV_LOG(ERR, "Failed to configure irqs");
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goto err_mtu;
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}
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ret = idpf_start_queues(dev);
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if (ret != 0) {
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PMD_DRV_LOG(ERR, "Failed to start queues");
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@ -376,6 +485,10 @@ idpf_dev_stop(struct rte_eth_dev *dev)
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idpf_stop_queues(dev);
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idpf_vc_config_irq_map_unmap(vport, false);
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idpf_vc_dealloc_vectors(vport);
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return 0;
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}
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@ -387,6 +500,11 @@ idpf_dev_close(struct rte_eth_dev *dev)
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idpf_vc_destroy_vport(vport);
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rte_free(vport->recv_vectors);
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vport->recv_vectors = NULL;
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rte_free(vport->qv_map);
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vport->qv_map = NULL;
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adapter->cur_vports &= ~RTE_BIT32(vport->devarg_id);
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@ -748,6 +866,8 @@ idpf_adapter_init(struct rte_pci_device *pci_dev, struct idpf_adapter *adapter)
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adapter->cur_vports = 0;
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adapter->cur_vport_nb = 0;
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adapter->used_vecs_num = 0;
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return ret;
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err_vports:
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@ -33,6 +33,9 @@
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#define IDPF_CTLQ_LEN 64
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#define IDPF_DFLT_MBX_BUF_SIZE 4096
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#define IDPF_DFLT_Q_VEC_NUM 1
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#define IDPF_DFLT_INTERVAL 16
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#define IDPF_MIN_BUF_SIZE 1024
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#define IDPF_MAX_FRAME_SIZE 9728
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#define IDPF_MIN_FRAME_SIZE 14
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@ -92,6 +95,11 @@ struct idpf_vport {
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struct rte_eth_dev_data *dev_data; /* Pointer to the device data */
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uint16_t max_pkt_len; /* Maximum packet length */
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/* MSIX info*/
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struct virtchnl2_queue_vector *qv_map; /* queue vector mapping */
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uint16_t max_vectors;
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struct virtchnl2_alloc_vectors *recv_vectors;
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/* Chunk info */
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struct idpf_chunks_info chunks_info;
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@ -124,6 +132,8 @@ struct idpf_adapter {
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uint16_t cur_vport_nb;
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uint16_t cur_vport_idx;
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uint16_t used_vecs_num;
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/* Max config queue number per VC message */
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uint32_t max_rxq_per_msg;
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uint32_t max_txq_per_msg;
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@ -198,6 +208,9 @@ int idpf_switch_queue(struct idpf_vport *vport, uint16_t qid,
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bool rx, bool on);
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int idpf_vc_ena_dis_queues(struct idpf_vport *vport, bool enable);
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int idpf_vc_ena_dis_vport(struct idpf_vport *vport, bool enable);
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int idpf_vc_config_irq_map_unmap(struct idpf_vport *vport, bool map);
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int idpf_vc_alloc_vectors(struct idpf_vport *vport, uint16_t num_vectors);
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int idpf_vc_dealloc_vectors(struct idpf_vport *vport);
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int idpf_vc_query_ptype_info(struct idpf_adapter *adapter);
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int idpf_read_one_msg(struct idpf_adapter *adapter, uint32_t ops,
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uint16_t buf_len, uint8_t *buf);
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@ -230,6 +230,10 @@ idpf_execute_vc_cmd(struct idpf_adapter *adapter, struct idpf_cmd_info *args)
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case VIRTCHNL2_OP_DISABLE_QUEUES:
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case VIRTCHNL2_OP_ENABLE_VPORT:
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case VIRTCHNL2_OP_DISABLE_VPORT:
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case VIRTCHNL2_OP_MAP_QUEUE_VECTOR:
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case VIRTCHNL2_OP_UNMAP_QUEUE_VECTOR:
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case VIRTCHNL2_OP_ALLOC_VECTORS:
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case VIRTCHNL2_OP_DEALLOC_VECTORS:
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/* for init virtchnl ops, need to poll the response */
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err = idpf_read_one_msg(adapter, args->ops, args->out_size, args->out_buffer);
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clear_cmd(adapter);
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@ -521,6 +525,8 @@ idpf_vc_get_caps(struct idpf_adapter *adapter)
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memset(&caps_msg, 0, sizeof(struct virtchnl2_get_capabilities));
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caps_msg.other_caps = VIRTCHNL2_CAP_WB_ON_ITR;
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args.ops = VIRTCHNL2_OP_GET_CAPS;
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args.in_args = (uint8_t *)&caps_msg;
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args.in_args_size = sizeof(caps_msg);
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@ -970,6 +976,113 @@ idpf_vc_config_txq(struct idpf_vport *vport, uint16_t txq_id)
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return err;
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}
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int
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idpf_vc_config_irq_map_unmap(struct idpf_vport *vport, bool map)
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{
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struct idpf_adapter *adapter = vport->adapter;
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struct virtchnl2_queue_vector_maps *map_info;
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struct virtchnl2_queue_vector *vecmap;
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uint16_t nb_rxq = vport->dev_data->nb_rx_queues;
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struct idpf_cmd_info args;
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int len, i, err = 0;
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len = sizeof(struct virtchnl2_queue_vector_maps) +
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(nb_rxq - 1) * sizeof(struct virtchnl2_queue_vector);
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map_info = rte_zmalloc("map_info", len, 0);
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if (map_info == NULL)
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return -ENOMEM;
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map_info->vport_id = vport->vport_id;
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map_info->num_qv_maps = nb_rxq;
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for (i = 0; i < nb_rxq; i++) {
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vecmap = &map_info->qv_maps[i];
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vecmap->queue_id = vport->qv_map[i].queue_id;
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vecmap->vector_id = vport->qv_map[i].vector_id;
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vecmap->itr_idx = VIRTCHNL2_ITR_IDX_0;
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vecmap->queue_type = VIRTCHNL2_QUEUE_TYPE_RX;
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}
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args.ops = map ? VIRTCHNL2_OP_MAP_QUEUE_VECTOR :
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VIRTCHNL2_OP_UNMAP_QUEUE_VECTOR;
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args.in_args = (u8 *)map_info;
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args.in_args_size = len;
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args.out_buffer = adapter->mbx_resp;
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args.out_size = IDPF_DFLT_MBX_BUF_SIZE;
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err = idpf_execute_vc_cmd(adapter, &args);
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if (err != 0)
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PMD_DRV_LOG(ERR, "Failed to execute command of VIRTCHNL2_OP_%s_QUEUE_VECTOR",
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map ? "MAP" : "UNMAP");
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rte_free(map_info);
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return err;
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}
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int
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idpf_vc_alloc_vectors(struct idpf_vport *vport, uint16_t num_vectors)
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{
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struct idpf_adapter *adapter = vport->adapter;
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struct virtchnl2_alloc_vectors *alloc_vec;
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struct idpf_cmd_info args;
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int err, len;
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len = sizeof(struct virtchnl2_alloc_vectors) +
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(num_vectors - 1) * sizeof(struct virtchnl2_vector_chunk);
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alloc_vec = rte_zmalloc("alloc_vec", len, 0);
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if (alloc_vec == NULL)
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return -ENOMEM;
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alloc_vec->num_vectors = num_vectors;
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args.ops = VIRTCHNL2_OP_ALLOC_VECTORS;
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args.in_args = (u8 *)alloc_vec;
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args.in_args_size = sizeof(struct virtchnl2_alloc_vectors);
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args.out_buffer = adapter->mbx_resp;
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args.out_size = IDPF_DFLT_MBX_BUF_SIZE;
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err = idpf_execute_vc_cmd(adapter, &args);
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if (err != 0)
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PMD_DRV_LOG(ERR, "Failed to execute command VIRTCHNL2_OP_ALLOC_VECTORS");
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if (vport->recv_vectors == NULL) {
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vport->recv_vectors = rte_zmalloc("recv_vectors", len, 0);
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if (vport->recv_vectors == NULL) {
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rte_free(alloc_vec);
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return -ENOMEM;
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}
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}
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rte_memcpy(vport->recv_vectors, args.out_buffer, len);
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rte_free(alloc_vec);
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return err;
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}
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int
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idpf_vc_dealloc_vectors(struct idpf_vport *vport)
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{
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struct idpf_adapter *adapter = vport->adapter;
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struct virtchnl2_alloc_vectors *alloc_vec;
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struct virtchnl2_vector_chunks *vcs;
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struct idpf_cmd_info args;
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int err, len;
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alloc_vec = vport->recv_vectors;
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vcs = &alloc_vec->vchunks;
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len = sizeof(struct virtchnl2_vector_chunks) +
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(vcs->num_vchunks - 1) * sizeof(struct virtchnl2_vector_chunk);
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args.ops = VIRTCHNL2_OP_DEALLOC_VECTORS;
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args.in_args = (u8 *)vcs;
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args.in_args_size = len;
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args.out_buffer = adapter->mbx_resp;
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args.out_size = IDPF_DFLT_MBX_BUF_SIZE;
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err = idpf_execute_vc_cmd(adapter, &args);
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if (err != 0)
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PMD_DRV_LOG(ERR, "Failed to execute command VIRTCHNL2_OP_DEALLOC_VECTORS");
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return err;
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}
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static int
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idpf_vc_ena_dis_one_queue(struct idpf_vport *vport, uint16_t qid,
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uint32_t type, bool on)
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