bus/dpaa: add compatibility and helper macros
Linked list, bit operations and compatibility macros. Signed-off-by: Geoff Thorpe <geoff.thorpe@nxp.com> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
This commit is contained in:
Hemant Agrawal
Ferruh Yigit
parent
919eeaccb2
commit
39f373cf01
385
drivers/bus/dpaa/include/compat.h
Normal file
385
drivers/bus/dpaa/include/compat.h
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@ -0,0 +1,385 @@
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/*-
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* BSD LICENSE
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*
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* Copyright 2011 Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the above-listed copyright holders nor the
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* names of any contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* GPL LICENSE SUMMARY
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __COMPAT_H
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#define __COMPAT_H
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#include <sched.h>
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#ifndef _GNU_SOURCE
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#define _GNU_SOURCE
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#endif
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#include <stdint.h>
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#include <stdlib.h>
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#include <stddef.h>
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#include <stdio.h>
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#include <errno.h>
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#include <string.h>
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#include <pthread.h>
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#include <linux/types.h>
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#include <stdbool.h>
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#include <ctype.h>
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#include <malloc.h>
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#include <sys/types.h>
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#include <sys/stat.h>
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#include <fcntl.h>
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#include <unistd.h>
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#include <sys/mman.h>
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#include <limits.h>
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#include <assert.h>
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#include <dirent.h>
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#include <inttypes.h>
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#include <error.h>
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#include <rte_byteorder.h>
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#include <rte_atomic.h>
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#include <rte_spinlock.h>
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#include <rte_common.h>
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#include <rte_debug.h>
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/* The following definitions are primarily to allow the single-source driver
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* interfaces to be included by arbitrary program code. Ie. for interfaces that
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* are also available in kernel-space, these definitions provide compatibility
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* with certain attributes and types used in those interfaces.
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*/
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/* Required compiler attributes */
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#define __maybe_unused __rte_unused
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#define __always_unused __rte_unused
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#define __packed __rte_packed
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#define noinline __attribute__((noinline))
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#define L1_CACHE_BYTES 64
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#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
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#define __stringify_1(x) #x
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#define __stringify(x) __stringify_1(x)
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#ifdef ARRAY_SIZE
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#undef ARRAY_SIZE
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#endif
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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/* Debugging */
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#define prflush(fmt, args...) \
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do { \
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printf(fmt, ##args); \
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fflush(stdout); \
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} while (0)
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#define pr_crit(fmt, args...) prflush("CRIT:" fmt, ##args)
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#define pr_err(fmt, args...) prflush("ERR:" fmt, ##args)
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#define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args)
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#define pr_info(fmt, args...) prflush(fmt, ##args)
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#ifdef RTE_LIBRTE_DPAA_DEBUG_BUS
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#ifdef pr_debug
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#undef pr_debug
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#endif
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#define pr_debug(fmt, args...) printf(fmt, ##args)
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#else
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#define pr_debug(fmt, args...) {}
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#endif
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#define DPAA_BUG_ON(x) RTE_ASSERT(x)
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/* Required types */
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typedef uint8_t u8;
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef uint64_t u64;
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typedef uint64_t dma_addr_t;
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typedef cpu_set_t cpumask_t;
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typedef uint32_t phandle;
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typedef uint32_t gfp_t;
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typedef uint32_t irqreturn_t;
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#define IRQ_HANDLED 0
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#define request_irq qbman_request_irq
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#define free_irq qbman_free_irq
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#define __iomem
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#define GFP_KERNEL 0
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#define __raw_readb(p) (*(const volatile unsigned char *)(p))
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#define __raw_readl(p) (*(const volatile unsigned int *)(p))
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#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
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/* to be used as an upper-limit only */
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#define NR_CPUS 64
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/* Waitqueue stuff */
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typedef struct { } wait_queue_head_t;
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#define DECLARE_WAIT_QUEUE_HEAD(x) int dummy_##x __always_unused
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#define wake_up(x) do { } while (0)
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/* I/O operations */
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static inline u32 in_be32(volatile void *__p)
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{
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volatile u32 *p = __p;
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return rte_be_to_cpu_32(*p);
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}
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static inline void out_be32(volatile void *__p, u32 val)
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{
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volatile u32 *p = __p;
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*p = rte_cpu_to_be_32(val);
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}
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#define dcbt_ro(p) __builtin_prefetch(p, 0)
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#define dcbt_rw(p) __builtin_prefetch(p, 1)
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#define dcbz(p) { asm volatile("dc zva, %0" : : "r" (p) : "memory"); }
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#define dcbz_64(p) dcbz(p)
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#define hwsync() rte_rmb()
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#define lwsync() rte_wmb()
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#define dcbf(p) { asm volatile("dc cvac, %0" : : "r"(p) : "memory"); }
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#define dcbf_64(p) dcbf(p)
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#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
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#define dcbit_ro(p) \
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do { \
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dccivac(p); \
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asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p)); \
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} while (0)
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#define barrier() { asm volatile ("" : : : "memory"); }
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#define cpu_relax barrier
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static inline uint64_t mfatb(void)
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{
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uint64_t ret, ret_new, timeout = 200;
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asm volatile ("mrs %0, cntvct_el0" : "=r" (ret));
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asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new));
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while (ret != ret_new && timeout--) {
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ret = ret_new;
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asm volatile ("mrs %0, cntvct_el0" : "=r" (ret_new));
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}
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DPAA_BUG_ON(!timeout && (ret != ret_new));
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return ret * 64;
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}
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/* Spin for a few cycles without bothering the bus */
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static inline void cpu_spin(int cycles)
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{
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uint64_t now = mfatb();
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while (mfatb() < (now + cycles))
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;
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}
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/* Qman/Bman API inlines and macros; */
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#ifdef lower_32_bits
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#undef lower_32_bits
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#endif
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#define lower_32_bits(x) ((u32)(x))
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#ifdef upper_32_bits
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#undef upper_32_bits
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#endif
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#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
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/*
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* Swap bytes of a 48-bit value.
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*/
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static inline uint64_t
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__bswap_48(uint64_t x)
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{
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return ((x & 0x0000000000ffULL) << 40) |
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((x & 0x00000000ff00ULL) << 24) |
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((x & 0x000000ff0000ULL) << 8) |
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((x & 0x0000ff000000ULL) >> 8) |
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((x & 0x00ff00000000ULL) >> 24) |
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((x & 0xff0000000000ULL) >> 40);
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}
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/*
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* Swap bytes of a 40-bit value.
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*/
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static inline uint64_t
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__bswap_40(uint64_t x)
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{
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return ((x & 0x00000000ffULL) << 32) |
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((x & 0x000000ff00ULL) << 16) |
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((x & 0x0000ff0000ULL)) |
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((x & 0x00ff000000ULL) >> 16) |
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((x & 0xff00000000ULL) >> 32);
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}
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/*
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* Swap bytes of a 24-bit value.
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*/
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static inline uint32_t
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__bswap_24(uint32_t x)
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{
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return ((x & 0x0000ffULL) << 16) |
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((x & 0x00ff00ULL)) |
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((x & 0xff0000ULL) >> 16);
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}
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#define be64_to_cpu(x) rte_be_to_cpu_64(x)
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#define be32_to_cpu(x) rte_be_to_cpu_32(x)
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#define be16_to_cpu(x) rte_be_to_cpu_16(x)
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#define cpu_to_be64(x) rte_cpu_to_be_64(x)
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#define cpu_to_be32(x) rte_cpu_to_be_32(x)
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#define cpu_to_be16(x) rte_cpu_to_be_16(x)
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#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
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#define cpu_to_be48(x) __bswap_48(x)
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#define be48_to_cpu(x) __bswap_48(x)
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#define cpu_to_be40(x) __bswap_40(x)
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#define be40_to_cpu(x) __bswap_40(x)
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#define cpu_to_be24(x) __bswap_24(x)
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#define be24_to_cpu(x) __bswap_24(x)
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#else /* RTE_BIG_ENDIAN */
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#define cpu_to_be48(x) (x)
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#define be48_to_cpu(x) (x)
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#define cpu_to_be40(x) (x)
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#define be40_to_cpu(x) (x)
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#define cpu_to_be24(x) (x)
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#define be24_to_cpu(x) (x)
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#endif /* RTE_BIG_ENDIAN */
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/* When copying aligned words or shorts, try to avoid memcpy() */
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/* memcpy() stuff - when you know alignments in advance */
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#define CONFIG_TRY_BETTER_MEMCPY
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#ifdef CONFIG_TRY_BETTER_MEMCPY
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static inline void copy_words(void *dest, const void *src, size_t sz)
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{
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u32 *__dest = dest;
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const u32 *__src = src;
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size_t __sz = sz >> 2;
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DPAA_BUG_ON((unsigned long)dest & 0x3);
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DPAA_BUG_ON((unsigned long)src & 0x3);
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DPAA_BUG_ON(sz & 0x3);
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while (__sz--)
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*(__dest++) = *(__src++);
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}
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static inline void copy_shorts(void *dest, const void *src, size_t sz)
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{
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u16 *__dest = dest;
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const u16 *__src = src;
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size_t __sz = sz >> 1;
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DPAA_BUG_ON((unsigned long)dest & 0x1);
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DPAA_BUG_ON((unsigned long)src & 0x1);
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DPAA_BUG_ON(sz & 0x1);
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while (__sz--)
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*(__dest++) = *(__src++);
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}
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static inline void copy_bytes(void *dest, const void *src, size_t sz)
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{
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u8 *__dest = dest;
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const u8 *__src = src;
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while (sz--)
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*(__dest++) = *(__src++);
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}
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#else
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#define copy_words memcpy
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#define copy_shorts memcpy
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#define copy_bytes memcpy
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#endif
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/* Allocator stuff */
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#define kmalloc(sz, t) malloc(sz)
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#define vmalloc(sz) malloc(sz)
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#define kfree(p) { if (p) free(p); }
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static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
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{
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void *ptr = malloc(sz);
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if (ptr)
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memset(ptr, 0, sz);
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return ptr;
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}
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static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused)
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{
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void *p;
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if (posix_memalign(&p, 4096, 4096))
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return 0;
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memset(p, 0, 4096);
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return (unsigned long)p;
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}
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/* Spinlock stuff */
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#define spinlock_t rte_spinlock_t
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#define __SPIN_LOCK_UNLOCKED(x) RTE_SPINLOCK_INITIALIZER
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#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x)
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#define spin_lock_init(x) rte_spinlock_init(x)
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#define spin_lock_destroy(x)
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#define spin_lock(x) rte_spinlock_lock(x)
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#define spin_unlock(x) rte_spinlock_unlock(x)
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#define spin_lock_irq(x) spin_lock(x)
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#define spin_unlock_irq(x) spin_unlock(x)
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#define spin_lock_irqsave(x, f) spin_lock_irq(x)
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#define spin_unlock_irqrestore(x, f) spin_unlock_irq(x)
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#define atomic_t rte_atomic32_t
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#define atomic_read(v) rte_atomic32_read(v)
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#define atomic_set(v, i) rte_atomic32_set(v, i)
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#define atomic_inc(v) rte_atomic32_add(v, 1)
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#define atomic_dec(v) rte_atomic32_sub(v, 1)
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#define atomic_inc_and_test(v) rte_atomic32_inc_and_test(v)
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#define atomic_dec_and_test(v) rte_atomic32_dec_and_test(v)
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#define atomic_inc_return(v) rte_atomic32_add_return(v, 1)
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#define atomic_dec_return(v) rte_atomic32_sub_return(v, 1)
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#define atomic_sub_and_test(i, v) (rte_atomic32_sub_return(v, i) == 0)
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#include <dpaa_list.h>
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#include <dpaa_bits.h>
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#endif /* __COMPAT_H */
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65
drivers/bus/dpaa/include/dpaa_bits.h
Normal file
65
drivers/bus/dpaa/include/dpaa_bits.h
Normal file
@ -0,0 +1,65 @@
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/*-
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* BSD LICENSE
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*
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* Copyright 2017 NXP.
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
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* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of NXP nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
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*/
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#ifndef __DPAA_BITS_H
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#define __DPAA_BITS_H
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/* Bitfield stuff. */
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#define BITS_PER_ULONG (sizeof(unsigned long) << 3)
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#define SHIFT_PER_ULONG (((1 << 5) == BITS_PER_ULONG) ? 5 : 6)
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#define BITS_MASK(idx) (1UL << ((idx) & (BITS_PER_ULONG - 1)))
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#define BITS_IDX(idx) ((idx) >> SHIFT_PER_ULONG)
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static inline void dpaa_set_bits(unsigned long mask,
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volatile unsigned long *p)
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{
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*p |= mask;
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}
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static inline void dpaa_set_bit(int idx, volatile unsigned long *bits)
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{
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dpaa_set_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
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}
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|
||||
static inline void dpaa_clear_bits(unsigned long mask,
|
||||
volatile unsigned long *p)
|
||||
{
|
||||
*p &= ~mask;
|
||||
}
|
||||
|
||||
static inline void dpaa_clear_bit(int idx,
|
||||
volatile unsigned long *bits)
|
||||
{
|
||||
dpaa_clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
|
||||
}
|
||||
|
||||
#endif /* __DPAA_BITS_H */
|
||||
101
drivers/bus/dpaa/include/dpaa_list.h
Normal file
101
drivers/bus/dpaa/include/dpaa_list.h
Normal file
@ -0,0 +1,101 @@
|
||||
/*-
|
||||
* BSD LICENSE
|
||||
*
|
||||
* Copyright 2017 NXP.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
*
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* * Neither the name of NXP nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef __DPAA_LIST_H
|
||||
#define __DPAA_LIST_H
|
||||
|
||||
/****************/
|
||||
/* Linked-lists */
|
||||
/****************/
|
||||
|
||||
struct list_head {
|
||||
struct list_head *prev;
|
||||
struct list_head *next;
|
||||
};
|
||||
|
||||
#define COMPAT_LIST_HEAD(n) \
|
||||
struct list_head n = { \
|
||||
.prev = &n, \
|
||||
.next = &n \
|
||||
}
|
||||
|
||||
#define INIT_LIST_HEAD(p) \
|
||||
do { \
|
||||
struct list_head *__p298 = (p); \
|
||||
__p298->next = __p298; \
|
||||
__p298->prev = __p298->next; \
|
||||
} while (0)
|
||||
#define list_entry(node, type, member) \
|
||||
(type *)((void *)node - offsetof(type, member))
|
||||
#define list_empty(p) \
|
||||
({ \
|
||||
const struct list_head *__p298 = (p); \
|
||||
((__p298->next == __p298) && (__p298->prev == __p298)); \
|
||||
})
|
||||
#define list_add(p, l) \
|
||||
do { \
|
||||
struct list_head *__p298 = (p); \
|
||||
struct list_head *__l298 = (l); \
|
||||
__p298->next = __l298->next; \
|
||||
__p298->prev = __l298; \
|
||||
__l298->next->prev = __p298; \
|
||||
__l298->next = __p298; \
|
||||
} while (0)
|
||||
#define list_add_tail(p, l) \
|
||||
do { \
|
||||
struct list_head *__p298 = (p); \
|
||||
struct list_head *__l298 = (l); \
|
||||
__p298->prev = __l298->prev; \
|
||||
__p298->next = __l298; \
|
||||
__l298->prev->next = __p298; \
|
||||
__l298->prev = __p298; \
|
||||
} while (0)
|
||||
#define list_for_each(i, l) \
|
||||
for (i = (l)->next; i != (l); i = i->next)
|
||||
#define list_for_each_safe(i, j, l) \
|
||||
for (i = (l)->next, j = i->next; i != (l); \
|
||||
i = j, j = i->next)
|
||||
#define list_for_each_entry(i, l, name) \
|
||||
for (i = list_entry((l)->next, typeof(*i), name); &i->name != (l); \
|
||||
i = list_entry(i->name.next, typeof(*i), name))
|
||||
#define list_for_each_entry_safe(i, j, l, name) \
|
||||
for (i = list_entry((l)->next, typeof(*i), name), \
|
||||
j = list_entry(i->name.next, typeof(*j), name); \
|
||||
&i->name != (l); \
|
||||
i = j, j = list_entry(j->name.next, typeof(*j), name))
|
||||
#define list_del(i) \
|
||||
do { \
|
||||
(i)->next->prev = (i)->prev; \
|
||||
(i)->prev->next = (i)->next; \
|
||||
} while (0)
|
||||
|
||||
#endif /* __DPAA_LIST_H */
|
||||
Loading…
x
Reference in New Issue
Block a user