net/txgbe: support EEPROM info get
Add EEPROM information get related operations. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
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@ -39,6 +39,8 @@ Basic stats = Y
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Extended stats = Y
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Stats per queue = Y
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FW version = Y
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EEPROM dump = Y
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Module EEPROM dump = Y
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Multiprocess aware = Y
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Linux UIO = Y
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Linux VFIO = Y
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@ -2740,8 +2740,12 @@ s32 txgbe_init_ops_pf(struct txgbe_hw *hw)
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phy->setup_link_speed = txgbe_setup_phy_link_speed;
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phy->read_i2c_byte = txgbe_read_i2c_byte;
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phy->write_i2c_byte = txgbe_write_i2c_byte;
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phy->read_i2c_sff8472 = txgbe_read_i2c_sff8472;
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phy->read_i2c_eeprom = txgbe_read_i2c_eeprom;
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phy->write_i2c_eeprom = txgbe_write_i2c_eeprom;
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phy->identify_sfp = txgbe_identify_module;
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phy->read_i2c_byte_unlocked = txgbe_read_i2c_byte_unlocked;
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phy->write_i2c_byte_unlocked = txgbe_write_i2c_byte_unlocked;
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phy->reset = txgbe_reset_phy;
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/* MAC */
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@ -1176,6 +1176,22 @@ s32 txgbe_read_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,
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eeprom_data);
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}
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/**
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* txgbe_read_i2c_sff8472 - Reads 8 bit word over I2C interface
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* @hw: pointer to hardware structure
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* @byte_offset: byte offset at address 0xA2
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* @sff8472_data: value read
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*
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* Performs byte read operation to SFP module's SFF-8472 data over I2C
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**/
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s32 txgbe_read_i2c_sff8472(struct txgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data)
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{
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return hw->phy.read_i2c_byte(hw, byte_offset,
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TXGBE_I2C_EEPROM_DEV_ADDR2,
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sff8472_data);
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}
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/**
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* txgbe_write_i2c_eeprom - Writes 8 bit EEPROM word over I2C interface
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* @hw: pointer to hardware structure
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@ -354,6 +354,7 @@ s32 txgbe_setup_phy_link_tnx(struct txgbe_hw *hw);
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s32 txgbe_identify_module(struct txgbe_hw *hw);
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s32 txgbe_identify_sfp_module(struct txgbe_hw *hw);
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s32 txgbe_identify_qsfp_module(struct txgbe_hw *hw);
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s32 txgbe_read_i2c_byte(struct txgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 *data);
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s32 txgbe_read_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,
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@ -362,6 +363,8 @@ s32 txgbe_write_i2c_byte(struct txgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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s32 txgbe_write_i2c_byte_unlocked(struct txgbe_hw *hw, u8 byte_offset,
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u8 dev_addr, u8 data);
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s32 txgbe_read_i2c_sff8472(struct txgbe_hw *hw, u8 byte_offset,
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u8 *sff8472_data);
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s32 txgbe_read_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,
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u8 *eeprom_data);
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s32 txgbe_write_i2c_eeprom(struct txgbe_hw *hw, u8 byte_offset,
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@ -3413,6 +3413,127 @@ txgbe_dev_set_mc_addr_list(struct rte_eth_dev *dev,
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txgbe_dev_addr_list_itr, TRUE);
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}
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static int
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txgbe_get_eeprom_length(struct rte_eth_dev *dev)
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{
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struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
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/* Return unit is byte count */
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return hw->rom.word_size * 2;
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}
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static int
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txgbe_get_eeprom(struct rte_eth_dev *dev,
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struct rte_dev_eeprom_info *in_eeprom)
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{
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struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
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struct txgbe_rom_info *eeprom = &hw->rom;
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uint16_t *data = in_eeprom->data;
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int first, length;
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first = in_eeprom->offset >> 1;
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length = in_eeprom->length >> 1;
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if (first > hw->rom.word_size ||
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((first + length) > hw->rom.word_size))
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return -EINVAL;
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in_eeprom->magic = hw->vendor_id | (hw->device_id << 16);
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return eeprom->readw_buffer(hw, first, length, data);
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}
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static int
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txgbe_set_eeprom(struct rte_eth_dev *dev,
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struct rte_dev_eeprom_info *in_eeprom)
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{
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struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
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struct txgbe_rom_info *eeprom = &hw->rom;
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uint16_t *data = in_eeprom->data;
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int first, length;
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first = in_eeprom->offset >> 1;
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length = in_eeprom->length >> 1;
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if (first > hw->rom.word_size ||
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((first + length) > hw->rom.word_size))
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return -EINVAL;
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in_eeprom->magic = hw->vendor_id | (hw->device_id << 16);
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return eeprom->writew_buffer(hw, first, length, data);
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}
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static int
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txgbe_get_module_info(struct rte_eth_dev *dev,
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struct rte_eth_dev_module_info *modinfo)
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{
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struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
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uint32_t status;
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uint8_t sff8472_rev, addr_mode;
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bool page_swap = false;
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/* Check whether we support SFF-8472 or not */
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status = hw->phy.read_i2c_eeprom(hw,
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TXGBE_SFF_SFF_8472_COMP,
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&sff8472_rev);
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if (status != 0)
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return -EIO;
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/* addressing mode is not supported */
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status = hw->phy.read_i2c_eeprom(hw,
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TXGBE_SFF_SFF_8472_SWAP,
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&addr_mode);
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if (status != 0)
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return -EIO;
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if (addr_mode & TXGBE_SFF_ADDRESSING_MODE) {
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PMD_DRV_LOG(ERR,
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"Address change required to access page 0xA2, "
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"but not supported. Please report the module "
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"type to the driver maintainers.");
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page_swap = true;
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}
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if (sff8472_rev == TXGBE_SFF_SFF_8472_UNSUP || page_swap) {
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/* We have a SFP, but it does not support SFF-8472 */
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modinfo->type = RTE_ETH_MODULE_SFF_8079;
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modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8079_LEN;
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} else {
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/* We have a SFP which supports a revision of SFF-8472. */
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modinfo->type = RTE_ETH_MODULE_SFF_8472;
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modinfo->eeprom_len = RTE_ETH_MODULE_SFF_8472_LEN;
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}
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return 0;
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}
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static int
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txgbe_get_module_eeprom(struct rte_eth_dev *dev,
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struct rte_dev_eeprom_info *info)
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{
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struct txgbe_hw *hw = TXGBE_DEV_HW(dev);
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uint32_t status = TXGBE_ERR_PHY_ADDR_INVALID;
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uint8_t databyte = 0xFF;
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uint8_t *data = info->data;
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uint32_t i = 0;
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if (info->length == 0)
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return -EINVAL;
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for (i = info->offset; i < info->offset + info->length; i++) {
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if (i < RTE_ETH_MODULE_SFF_8079_LEN)
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status = hw->phy.read_i2c_eeprom(hw, i, &databyte);
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else
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status = hw->phy.read_i2c_sff8472(hw, i, &databyte);
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if (status != 0)
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return -EIO;
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data[i - info->offset] = databyte;
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}
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return 0;
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}
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bool
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txgbe_rss_update_sp(enum txgbe_mac_type mac_type)
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{
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@ -3479,6 +3600,11 @@ static const struct eth_dev_ops txgbe_eth_dev_ops = {
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.set_mc_addr_list = txgbe_dev_set_mc_addr_list,
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.rxq_info_get = txgbe_rxq_info_get,
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.txq_info_get = txgbe_txq_info_get,
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.get_eeprom_length = txgbe_get_eeprom_length,
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.get_eeprom = txgbe_get_eeprom,
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.set_eeprom = txgbe_set_eeprom,
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.get_module_info = txgbe_get_module_info,
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.get_module_eeprom = txgbe_get_module_eeprom,
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};
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RTE_PMD_REGISTER_PCI(net_txgbe, rte_txgbe_pmd);
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