net/mlx5: update modify field action
Update immediate value/pointer source operand support
for modify field RTE Flow action:
- source operand data can be presented by byte buffer
(instead of former uint64_t) or by pointer
- no host byte ordering is assumed anymore for immediate
data buffer (not uint64_t anymore)
- no immediate value offset is expected (the source
subfield is located at the same offset as in destination)
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
This commit is contained in:
Viacheslav Ovsiienko
Ferruh Yigit
parent
a2b97fb7f5
commit
40c8fb1fd3
@ -1391,7 +1391,7 @@ flow_dv_convert_action_modify_ipv6_dscp
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static int
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mlx5_flow_item_field_width(struct mlx5_priv *priv,
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enum rte_flow_field_id field)
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enum rte_flow_field_id field, int inherit)
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{
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switch (field) {
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case RTE_FLOW_FIELD_START:
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@ -1442,7 +1442,7 @@ mlx5_flow_item_field_width(struct mlx5_priv *priv,
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return __builtin_popcount(priv->sh->dv_meta_mask);
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case RTE_FLOW_FIELD_POINTER:
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case RTE_FLOW_FIELD_VALUE:
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return 64;
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return inherit < 0 ? 0 : inherit;
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default:
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MLX5_ASSERT(false);
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}
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@ -1452,17 +1452,14 @@ mlx5_flow_item_field_width(struct mlx5_priv *priv,
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static void
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mlx5_flow_field_id_to_modify_info
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(const struct rte_flow_action_modify_data *data,
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struct field_modify_info *info,
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uint32_t *mask, uint32_t *value,
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uint32_t width, uint32_t dst_width,
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uint32_t *shift, struct rte_eth_dev *dev,
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const struct rte_flow_attr *attr,
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struct rte_flow_error *error)
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struct field_modify_info *info, uint32_t *mask,
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uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
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const struct rte_flow_attr *attr, struct rte_flow_error *error)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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uint32_t idx = 0;
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uint32_t off = 0;
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uint64_t val = 0;
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switch (data->field) {
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case RTE_FLOW_FIELD_START:
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/* not supported yet */
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@ -1472,7 +1469,7 @@ mlx5_flow_field_id_to_modify_info
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off = data->offset > 16 ? data->offset - 16 : 0;
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if (mask) {
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if (data->offset < 16) {
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info[idx] = (struct field_modify_info){2, 0,
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info[idx] = (struct field_modify_info){2, 4,
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MLX5_MODI_OUT_DMAC_15_0};
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if (width < 16) {
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mask[idx] = rte_cpu_to_be_16(0xffff >>
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@ -1486,15 +1483,15 @@ mlx5_flow_field_id_to_modify_info
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break;
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++idx;
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}
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info[idx] = (struct field_modify_info){4, 4 * idx,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_DMAC_47_16};
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mask[idx] = rte_cpu_to_be_32((0xffffffff >>
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(32 - width)) << off);
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} else {
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if (data->offset < 16)
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info[idx++] = (struct field_modify_info){2, 0,
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info[idx++] = (struct field_modify_info){2, 4,
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MLX5_MODI_OUT_DMAC_15_0};
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info[idx] = (struct field_modify_info){4, off,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_DMAC_47_16};
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}
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break;
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@ -1502,7 +1499,7 @@ mlx5_flow_field_id_to_modify_info
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off = data->offset > 16 ? data->offset - 16 : 0;
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if (mask) {
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if (data->offset < 16) {
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info[idx] = (struct field_modify_info){2, 0,
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info[idx] = (struct field_modify_info){2, 4,
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MLX5_MODI_OUT_SMAC_15_0};
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if (width < 16) {
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mask[idx] = rte_cpu_to_be_16(0xffff >>
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@ -1516,15 +1513,15 @@ mlx5_flow_field_id_to_modify_info
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break;
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++idx;
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}
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info[idx] = (struct field_modify_info){4, 4 * idx,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_SMAC_47_16};
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mask[idx] = rte_cpu_to_be_32((0xffffffff >>
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(32 - width)) << off);
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} else {
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if (data->offset < 16)
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info[idx++] = (struct field_modify_info){2, 0,
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info[idx++] = (struct field_modify_info){2, 4,
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MLX5_MODI_OUT_SMAC_15_0};
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info[idx] = (struct field_modify_info){4, off,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_SMAC_47_16};
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}
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break;
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@ -1584,8 +1581,7 @@ mlx5_flow_field_id_to_modify_info
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case RTE_FLOW_FIELD_IPV6_SRC:
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if (mask) {
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if (data->offset < 32) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 12,
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MLX5_MODI_OUT_SIPV6_31_0};
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if (width < 32) {
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mask[idx] =
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@ -1601,8 +1597,7 @@ mlx5_flow_field_id_to_modify_info
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++idx;
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}
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if (data->offset < 64) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 8,
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MLX5_MODI_OUT_SIPV6_63_32};
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if (width < 32) {
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mask[idx] =
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@ -1618,8 +1613,7 @@ mlx5_flow_field_id_to_modify_info
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++idx;
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}
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if (data->offset < 96) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 4,
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MLX5_MODI_OUT_SIPV6_95_64};
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if (width < 32) {
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mask[idx] =
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@ -1634,19 +1628,19 @@ mlx5_flow_field_id_to_modify_info
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break;
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++idx;
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}
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info[idx] = (struct field_modify_info){4, 4 * idx,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_SIPV6_127_96};
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mask[idx] = rte_cpu_to_be_32(0xffffffff >>
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(32 - width));
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} else {
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if (data->offset < 32)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 12,
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MLX5_MODI_OUT_SIPV6_31_0};
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if (data->offset < 64)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 8,
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MLX5_MODI_OUT_SIPV6_63_32};
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if (data->offset < 96)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 4,
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MLX5_MODI_OUT_SIPV6_95_64};
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if (data->offset < 128)
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info[idx++] = (struct field_modify_info){4, 0,
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@ -1656,8 +1650,7 @@ mlx5_flow_field_id_to_modify_info
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case RTE_FLOW_FIELD_IPV6_DST:
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if (mask) {
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if (data->offset < 32) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 12,
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MLX5_MODI_OUT_DIPV6_31_0};
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if (width < 32) {
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mask[idx] =
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@ -1673,8 +1666,7 @@ mlx5_flow_field_id_to_modify_info
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++idx;
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}
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if (data->offset < 64) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 8,
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MLX5_MODI_OUT_DIPV6_63_32};
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if (width < 32) {
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mask[idx] =
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@ -1690,8 +1682,7 @@ mlx5_flow_field_id_to_modify_info
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++idx;
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}
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if (data->offset < 96) {
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info[idx] = (struct field_modify_info){4,
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4 * idx,
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info[idx] = (struct field_modify_info){4, 4,
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MLX5_MODI_OUT_DIPV6_95_64};
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if (width < 32) {
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mask[idx] =
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@ -1706,19 +1697,19 @@ mlx5_flow_field_id_to_modify_info
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break;
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++idx;
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}
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info[idx] = (struct field_modify_info){4, 4 * idx,
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info[idx] = (struct field_modify_info){4, 0,
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MLX5_MODI_OUT_DIPV6_127_96};
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mask[idx] = rte_cpu_to_be_32(0xffffffff >>
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(32 - width));
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} else {
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if (data->offset < 32)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 12,
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MLX5_MODI_OUT_DIPV6_31_0};
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if (data->offset < 64)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 8,
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MLX5_MODI_OUT_DIPV6_63_32};
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if (data->offset < 96)
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info[idx++] = (struct field_modify_info){4, 0,
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info[idx++] = (struct field_modify_info){4, 4,
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MLX5_MODI_OUT_DIPV6_95_64};
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if (data->offset < 128)
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info[idx++] = (struct field_modify_info){4, 0,
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@ -1838,35 +1829,6 @@ mlx5_flow_field_id_to_modify_info
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break;
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case RTE_FLOW_FIELD_POINTER:
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case RTE_FLOW_FIELD_VALUE:
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if (data->field == RTE_FLOW_FIELD_POINTER)
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memcpy(&val, (void *)(uintptr_t)data->value,
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sizeof(uint64_t));
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else
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val = data->value;
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for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
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if (mask[idx]) {
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if (dst_width == 48) {
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/*special case for MAC addresses */
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value[idx] = rte_cpu_to_be_16(val);
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val >>= 16;
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dst_width -= 16;
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} else if (dst_width > 16) {
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value[idx] = rte_cpu_to_be_32(val);
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val >>= 32;
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} else if (dst_width > 8) {
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value[idx] = rte_cpu_to_be_16(val);
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val >>= 16;
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} else {
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value[idx] = (uint8_t)val;
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val >>= 8;
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}
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if (*shift)
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value[idx] <<= *shift;
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if (!val)
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break;
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}
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}
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break;
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default:
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MLX5_ASSERT(false);
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break;
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@ -1898,42 +1860,40 @@ flow_dv_convert_action_modify_field
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const struct rte_flow_attr *attr,
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struct rte_flow_error *error)
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{
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struct mlx5_priv *priv = dev->data->dev_private;
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const struct rte_flow_action_modify_field *conf =
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(const struct rte_flow_action_modify_field *)(action->conf);
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struct rte_flow_item item;
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struct rte_flow_item item = {
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.spec = NULL,
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.mask = NULL
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};
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struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
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{0, 0, 0} };
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struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
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{0, 0, 0} };
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uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
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uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
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uint32_t type;
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uint32_t shift = 0;
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uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
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if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
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conf->src.field == RTE_FLOW_FIELD_VALUE) {
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conf->src.field == RTE_FLOW_FIELD_VALUE) {
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type = MLX5_MODIFICATION_TYPE_SET;
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/** For SET fill the destination field (field) first. */
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mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
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value, conf->width, dst_width,
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&shift, dev, attr, error);
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/** Then copy immediate value from source as per mask. */
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mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
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value, conf->width, dst_width,
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&shift, dev, attr, error);
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item.spec = &value;
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conf->width, &shift, dev,
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attr, error);
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item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
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(void *)(uintptr_t)conf->src.pvalue :
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(void *)(uintptr_t)&conf->src.value;
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} else {
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type = MLX5_MODIFICATION_TYPE_COPY;
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/** For COPY fill the destination field (dcopy) without mask. */
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mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
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value, conf->width, dst_width,
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&shift, dev, attr, error);
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conf->width, &shift, dev,
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attr, error);
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/** Then construct the source field (field) with mask. */
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mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
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value, conf->width, dst_width,
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&shift, dev, attr, error);
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conf->width, &shift,
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dev, attr, error);
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}
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item.mask = &mask;
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return flow_dv_convert_modify_action(&item,
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@ -4854,9 +4814,9 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
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const struct rte_flow_action_modify_field *action_modify_field =
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action->conf;
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uint32_t dst_width = mlx5_flow_item_field_width(priv,
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action_modify_field->dst.field);
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action_modify_field->dst.field, -1);
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uint32_t src_width = mlx5_flow_item_field_width(priv,
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action_modify_field->src.field);
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action_modify_field->src.field, dst_width);
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ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
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if (ret)
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