doc: update feature list for cryptodevs
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
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@ -10,6 +10,7 @@ CPU AESNI = Y
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CPU SSE = Y
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CPU AVX = Y
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CPU AVX2 = Y
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Mbuf scatter gather = Y
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;
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; Supported crypto algorithms of the 'aesni_gcm' crypto driver.
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;
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@ -18,6 +18,7 @@ CPU AVX512 =
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CPU AESNI =
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CPU NEON =
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CPU ARM CE =
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Mbuf scatter gather =
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;
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; Supported crypto algorithms of a default crypto driver.
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@ -6,6 +6,7 @@
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[Features]
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Symmetric crypto = Y
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Sym operation chaining = Y
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Mbuf scatter gather = Y
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;
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; Supported crypto algorithms of the 'null' crypto driver.
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@ -6,6 +6,7 @@
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[Features]
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Symmetric crypto = Y
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Sym operation chaining = Y
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Mbuf scatter gather = Y
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;
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; Supported crypto algorithms of the 'openssl' crypto driver.
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@ -7,6 +7,7 @@
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Symmetric crypto = Y
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Sym operation chaining = Y
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HW Accelerated = Y
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Mbuf scatter gather = Y
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;
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; Supported crypto algorithms of the 'qat' crypto driver.
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