ixgbe: configure VF RSS
It needs config RSS and IXGBE_MRQC and IXGBE_VFPSRTYPE to enable VF RSS. The psrtype will determine how many queues the received packets will distribute to, and the value of psrtype should depends on both facet: max VF rxq number which has been negotiated with PF, and the number of rxq specified in config on guest. Signed-off-by: Changchun Ouyang <changchun.ouyang@intel.com> Reviewed-by: Vlad Zolotarov <vladz@cloudius-systems.com>
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@ -187,6 +187,21 @@ int ixgbe_pf_host_configure(struct rte_eth_dev *eth_dev)
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IXGBE_WRITE_REG(hw, IXGBE_MPSAR_LO(hw->mac.num_rar_entries), 0);
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IXGBE_WRITE_REG(hw, IXGBE_MPSAR_HI(hw->mac.num_rar_entries), 0);
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/*
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* VF RSS can support at most 4 queues for each VF, even if
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* 8 queues are available for each VF, it need refine to 4
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* queues here due to this limitation, otherwise no queue
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* will receive any packet even RSS is enabled.
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*/
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if (eth_dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_VMDQ_RSS) {
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if (RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool == 8) {
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RTE_ETH_DEV_SRIOV(eth_dev).active = ETH_32_POOLS;
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RTE_ETH_DEV_SRIOV(eth_dev).nb_q_per_pool = 4;
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RTE_ETH_DEV_SRIOV(eth_dev).def_pool_q_idx =
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dev_num_vf(eth_dev) * 4;
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}
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}
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/* set VMDq map to default PF pool */
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hw->mac.ops.set_vmdq(hw, 0, RTE_ETH_DEV_SRIOV(eth_dev).def_vmdq_idx);
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@ -3339,6 +3339,67 @@ ixgbe_alloc_rx_queue_mbufs(struct igb_rx_queue *rxq)
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return 0;
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}
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static int
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ixgbe_config_vf_rss(struct rte_eth_dev *dev)
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{
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struct ixgbe_hw *hw;
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uint32_t mrqc;
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ixgbe_rss_configure(dev);
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hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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/* MRQC: enable VF RSS */
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mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
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mrqc &= ~IXGBE_MRQC_MRQE_MASK;
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switch (RTE_ETH_DEV_SRIOV(dev).active) {
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case ETH_64_POOLS:
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mrqc |= IXGBE_MRQC_VMDQRSS64EN;
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break;
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case ETH_32_POOLS:
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mrqc |= IXGBE_MRQC_VMDQRSS32EN;
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break;
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default:
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PMD_INIT_LOG(ERR, "Invalid pool number in IOV mode with VMDQ RSS");
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return -EINVAL;
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}
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
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return 0;
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}
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static int
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ixgbe_config_vf_default(struct rte_eth_dev *dev)
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{
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struct ixgbe_hw *hw =
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IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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switch (RTE_ETH_DEV_SRIOV(dev).active) {
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case ETH_64_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC,
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IXGBE_MRQC_VMDQEN);
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break;
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case ETH_32_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC,
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IXGBE_MRQC_VMDQRT4TCEN);
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break;
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case ETH_16_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC,
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IXGBE_MRQC_VMDQRT8TCEN);
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break;
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default:
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PMD_INIT_LOG(ERR,
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"invalid pool number in IOV mode");
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break;
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}
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return 0;
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}
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static int
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ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)
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{
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@ -3371,24 +3432,25 @@ ixgbe_dev_mq_rx_configure(struct rte_eth_dev *dev)
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default: ixgbe_rss_disable(dev);
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}
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} else {
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switch (RTE_ETH_DEV_SRIOV(dev).active) {
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/*
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* SRIOV active scheme
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* FIXME if support DCB/RSS together with VMDq & SRIOV
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* Support RSS together with VMDq & SRIOV
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*/
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case ETH_64_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQEN);
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switch (dev->data->dev_conf.rxmode.mq_mode) {
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case ETH_MQ_RX_RSS:
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case ETH_MQ_RX_VMDQ_RSS:
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ixgbe_config_vf_rss(dev);
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break;
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case ETH_32_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQRT4TCEN);
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break;
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case ETH_16_POOLS:
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IXGBE_WRITE_REG(hw, IXGBE_MRQC, IXGBE_MRQC_VMDQRT8TCEN);
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break;
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/* FIXME if support DCB/RSS together with VMDq & SRIOV */
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case ETH_MQ_RX_VMDQ_DCB:
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case ETH_MQ_RX_VMDQ_DCB_RSS:
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PMD_INIT_LOG(ERR,
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"Could not support DCB with VMDq & SRIOV");
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return -1;
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default:
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PMD_INIT_LOG(ERR, "invalid pool number in IOV mode");
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ixgbe_config_vf_default(dev);
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break;
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}
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}
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@ -4006,6 +4068,19 @@ ixgbevf_dev_rx_init(struct rte_eth_dev *dev)
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PMD_INIT_FUNC_TRACE();
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hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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if (rte_is_power_of_2(dev->data->nb_rx_queues) == 0) {
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PMD_INIT_LOG(ERR, "The number of Rx queue invalid, "
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"it should be power of 2");
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return -1;
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}
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if (dev->data->nb_rx_queues > hw->mac.max_rx_queues) {
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PMD_INIT_LOG(ERR, "The number of Rx queue invalid, "
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"it should be equal to or less than %d",
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hw->mac.max_rx_queues);
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return -1;
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}
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/*
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* When the VF driver issues a IXGBE_VF_RESET request, the PF driver
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* disables the VF receipt of packets if the PF MTU is > 1500.
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@ -4107,6 +4182,9 @@ ixgbevf_dev_rx_init(struct rte_eth_dev *dev)
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IXGBE_PSRTYPE_IPV6HDR;
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#endif
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/* Set RQPL for VF RSS according to max Rx queue */
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psrtype |= (dev->data->nb_rx_queues >> 1) <<
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IXGBE_PSRTYPE_RQPL_SHIFT;
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IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
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if (dev->data->dev_conf.rxmode.enable_scatter) {
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