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ixgbe: select pool by MAC when using double VLAN

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On X550, as required by datasheet, E-tag packets are not expected
when double VLAN are used. So modify the register PFVTCTL after
enabling double VLAN to select pool by MAC but not MAC or E-tag.

An introduction of E-tag:
It's defined in IEEE802.1br. Please reference this website,
http://www.ieee802.org/1/pages/802.1br.html.

A brief description.
E-tag means external tag, and it's a kind of l2 tunnel. It means a
tag will be inserted in the l2 header. Like below,
   |31            24|23           16|15         8|7           0|
  0|                   Destination MAC address                 |
  4|     Dest MAC address(cont.)    |     Src MAC address      |
  8|                  Source MAC address(cont.)                |
 12| E-tag Etherenet type (0x893f)  |      E-tag header        |
 16|                    E-tag header(cont.)                    |
 20|   VLAN Ethertype(optional)     |   VLAN header(optional)  |
 24|         Original type          |         ......           |
...|                              ......                       |
The E-tag format is like below,
   |0                    15|16   18|19 |20                   31|
   |   Ethertype - 0x893f  | E-PCP |DEI|   Ingress E-CID_base  |

   |32  33|34 35|36      47|48         55    |56             63|
   |  RSV | GRP |E-CID_base|Ingress_E-CID_ext|    E-CID_ext    |

The Ingess_E-CID_ext and E-CID_ext are always zero for endpoints
and are effectively reserved.

The more details of E-tag is in IEEE 802.1BR. 802.1BR is used to
replace 802.1Qbh. 802.1BR is a standard for Bridge Port Extension.
It specifies the operation of Bridge Port Extenders, including
management, protocols, and algorithms. Bridge Port Extenders
operate in support of the MAC Service by Extended Bridges.
The E-tag is added to l2 header to identify the VM channel and
the virtual port.

Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Tested-by: Yong Liu <yong.liu@intel.com>
This commit is contained in:
Wenzhuo Lu 2016-03-11 09:10:07 +08:00 committed by Thomas Monjalon
parent c7a4ff8072
commit 43a942393d
1 changed files with 10 additions and 0 deletions
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10
drivers/net/ixgbe/ixgbe_ethdev.c
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@ -138,6 +138,8 @@
#define IXGBE_CYCLECOUNTER_MASK 0xffffffffffffffffULL
#define IXGBE_VT_CTL_POOLING_MODE_MASK 0x00030000
static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev);
static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev);
static int ixgbe_dev_configure(struct rte_eth_dev *dev);
@ -1740,6 +1742,14 @@ ixgbe_vlan_hw_extend_enable(struct rte_eth_dev *dev)
ctrl |= IXGBE_EXTENDED_VLAN;
IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl);
/* Clear pooling mode of PFVTCTL. It's required by X550. */
if (hw->mac.type == ixgbe_mac_X550 ||
hw->mac.type == ixgbe_mac_X550EM_x) {
ctrl = IXGBE_READ_REG(hw, IXGBE_VT_CTL);
ctrl &= ~IXGBE_VT_CTL_POOLING_MODE_MASK;
IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, ctrl);
}
/*
* VET EXT field in the EXVET register = 0x8100 by default
* So no need to change. Same to VT field of DMATXCTL register