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raw/octeontx2_dma: support multiple DPI blocks

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This patch adds support for multiple DPI blocks by removing the fixed
macro that was writing to same sysfs entry for different DPI blocks.

Signed-off-by: Radha Mohan Chintakuntla <radhac@marvell.com>
Reviewed-by: Satananda Burla <sburla@marvell.com>
Acked-by: Satha Rao <skoteshwar@marvell.com>
This commit is contained in:
Radha Mohan Chintakuntla 2020-10-05 22:30:21 -07:00 committed by Thomas Monjalon
parent f4c453765e
commit 4495bd887d
3 changed files with 13 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

18
drivers/raw/octeontx2_dma/otx2_dpi_msg.c
View File

@ -39,14 +39,14 @@ union dpi_mbox_message_u {
};
static inline int
send_msg_to_pf(const char *value, int size)
send_msg_to_pf(struct rte_pci_addr *pci, const char *value, int size)
{
char buff[255] = { 0 };
int res, fd;
res = snprintf(buff, sizeof(buff), "%s/" PCI_PRI_FMT "/%s",
rte_pci_get_sysfs_path(), DPI_PF_DBDF_DOMAIN,
DPI_PF_DBDF_BUS, DPI_PF_DBDF_DEVICE & 0x7,
rte_pci_get_sysfs_path(), pci->domain,
pci->bus, DPI_PF_DBDF_DEVICE & 0x7,
DPI_PF_DBDF_FUNCTION & 0x7, DPI_PF_MBOX_SYSFS_ENTRY);
if ((res < 0) || ((size_t)res > sizeof(buff)))
return -ERANGE;
@ -63,20 +63,20 @@ send_msg_to_pf(const char *value, int size)
}
int
otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura)
otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
mbox_msg.s.vfid = vf_id;
mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_OPEN;
mbox_msg.s.csize = size;
mbox_msg.s.aura = gaura;
mbox_msg.s.sso_pf_func = otx2_sso_pf_func_get();
mbox_msg.s.npa_pf_func = otx2_npa_pf_func_get();
ret = send_msg_to_pf((const char *)&mbox_msg,
ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");
@ -85,16 +85,16 @@ otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura)
}
int
otx2_dpi_queue_close(uint16_t vf_id)
otx2_dpi_queue_close(struct dpi_vf_s *dpivf)
{
union dpi_mbox_message_u mbox_msg;
int ret = 0;
/* DPI PF driver expects vfid starts from index 0 */
mbox_msg.s.vfid = vf_id;
mbox_msg.s.vfid = dpivf->vf_id;
mbox_msg.s.cmd = DPI_QUEUE_CLOSE;
ret = send_msg_to_pf((const char *)&mbox_msg,
ret = send_msg_to_pf(&dpivf->dev->addr, (const char *)&mbox_msg,
sizeof(mbox_msg));
if (ret < 0)
otx2_dpi_dbg("Failed to send mbox message to dpi pf");

4
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c
View File

@ -60,7 +60,7 @@ dma_queue_finish(struct dpi_vf_s *dpivf)
reg = otx2_read64(dpivf->vf_bar0 + DPI_VDMA_SADDR);
}
if (otx2_dpi_queue_close(dpivf->vf_id) < 0)
if (otx2_dpi_queue_close(dpivf) < 0)
return -EACCES;
rte_mempool_put(dpivf->chunk_pool, dpivf->base_ptr);
@ -323,7 +323,7 @@ otx2_dpi_rawdev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config,
otx2_write64(0, dpivf->vf_bar0 + DPI_VDMA_REQQ_CTL);
otx2_write64(((uint64_t)buf >> 7) << 7,
dpivf->vf_bar0 + DPI_VDMA_SADDR);
if (otx2_dpi_queue_open(dpivf->vf_id, DPI_CHUNK_SIZE, gaura) < 0) {
if (otx2_dpi_queue_open(dpivf, DPI_CHUNK_SIZE, gaura) < 0) {
otx2_err("Unable to open DPI VF %d", dpivf->vf_id);
rte_mempool_put(conf->chunk_pool, buf);
return -EACCES;

4
drivers/raw/octeontx2_dma/otx2_dpi_rawdev.h
View File

@ -190,8 +190,8 @@ union dpi_dma_instr_hdr_u {
} s;
};
int otx2_dpi_queue_open(uint16_t vf_id, uint32_t size, uint32_t gaura);
int otx2_dpi_queue_close(uint16_t vf_id);
int otx2_dpi_queue_open(struct dpi_vf_s *dpivf, uint32_t size, uint32_t gaura);
int otx2_dpi_queue_close(struct dpi_vf_s *dpivf);
int test_otx2_dma_rawdev(uint16_t val);
#endif /* _DPI_RAWDEV_H_ */