event/dsw: add device and queue configuration
Allow queue- and device-level configuration for and retrieval of contextual information from a DSW event device. Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
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@ -9,6 +9,91 @@
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#define EVENTDEV_NAME_DSW_PMD event_dsw
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static int
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dsw_queue_setup(struct rte_eventdev *dev, uint8_t queue_id,
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const struct rte_event_queue_conf *conf)
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{
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struct dsw_evdev *dsw = dsw_pmd_priv(dev);
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struct dsw_queue *queue = &dsw->queues[queue_id];
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if (RTE_EVENT_QUEUE_CFG_ALL_TYPES & conf->event_queue_cfg)
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return -ENOTSUP;
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if (conf->schedule_type == RTE_SCHED_TYPE_ORDERED)
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return -ENOTSUP;
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/* SINGLE_LINK is better off treated as TYPE_ATOMIC, since it
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* avoid the "fake" TYPE_PARALLEL flow_id assignment. Since
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* the queue will only have a single serving port, no
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* migration will ever happen, so the extra TYPE_ATOMIC
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* migration overhead is avoided.
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*/
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if (RTE_EVENT_QUEUE_CFG_SINGLE_LINK & conf->event_queue_cfg)
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queue->schedule_type = RTE_SCHED_TYPE_ATOMIC;
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else /* atomic or parallel */
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queue->schedule_type = conf->schedule_type;
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queue->num_serving_ports = 0;
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return 0;
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}
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static void
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dsw_queue_def_conf(struct rte_eventdev *dev __rte_unused,
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uint8_t queue_id __rte_unused,
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struct rte_event_queue_conf *queue_conf)
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{
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*queue_conf = (struct rte_event_queue_conf) {
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.nb_atomic_flows = 4096,
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.schedule_type = RTE_SCHED_TYPE_ATOMIC,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL
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};
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}
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static void
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dsw_queue_release(struct rte_eventdev *dev __rte_unused,
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uint8_t queue_id __rte_unused)
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{
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}
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static void
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dsw_info_get(struct rte_eventdev *dev __rte_unused,
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struct rte_event_dev_info *info)
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{
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*info = (struct rte_event_dev_info) {
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.driver_name = DSW_PMD_NAME,
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.max_event_queues = DSW_MAX_QUEUES,
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.max_event_queue_flows = DSW_MAX_FLOWS,
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.max_event_queue_priority_levels = 1,
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.max_event_priority_levels = 1,
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.max_event_ports = DSW_MAX_PORTS,
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.max_event_port_dequeue_depth = DSW_MAX_PORT_DEQUEUE_DEPTH,
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.max_event_port_enqueue_depth = DSW_MAX_PORT_ENQUEUE_DEPTH,
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.max_num_events = DSW_MAX_EVENTS,
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.event_dev_cap = RTE_EVENT_DEV_CAP_BURST_MODE|
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RTE_EVENT_DEV_CAP_DISTRIBUTED_SCHED
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};
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}
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static int
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dsw_configure(const struct rte_eventdev *dev)
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{
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struct dsw_evdev *dsw = dsw_pmd_priv(dev);
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const struct rte_event_dev_config *conf = &dev->data->dev_conf;
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dsw->num_queues = conf->nb_event_queues;
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return 0;
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}
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static struct rte_eventdev_ops dsw_evdev_ops = {
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.queue_setup = dsw_queue_setup,
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.queue_def_conf = dsw_queue_def_conf,
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.queue_release = dsw_queue_release,
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.dev_infos_get = dsw_info_get,
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.dev_configure = dsw_configure,
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};
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static int
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dsw_probe(struct rte_vdev_device *vdev)
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{
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@ -23,6 +108,8 @@ dsw_probe(struct rte_vdev_device *vdev)
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if (dev == NULL)
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return -EFAULT;
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dev->dev_ops = &dsw_evdev_ops;
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if (rte_eal_process_type() != RTE_PROC_PRIMARY)
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return 0;
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@ -9,8 +9,36 @@
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#define DSW_PMD_NAME RTE_STR(event_dsw)
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struct dsw_evdev {
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struct rte_eventdev_data *data;
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/* Code changes are required to allow more ports. */
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#define DSW_MAX_PORTS (64)
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#define DSW_MAX_PORT_DEQUEUE_DEPTH (128)
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#define DSW_MAX_PORT_ENQUEUE_DEPTH (128)
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#define DSW_MAX_QUEUES (16)
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#define DSW_MAX_EVENTS (16384)
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/* Code changes are required to allow more flows than 32k. */
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#define DSW_MAX_FLOWS_BITS (15)
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#define DSW_MAX_FLOWS (1<<(DSW_MAX_FLOWS_BITS))
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#define DSW_MAX_FLOWS_MASK (DSW_MAX_FLOWS-1)
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struct dsw_queue {
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uint8_t schedule_type;
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uint16_t num_serving_ports;
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};
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struct dsw_evdev {
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struct rte_eventdev_data *data;
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struct dsw_queue queues[DSW_MAX_QUEUES];
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uint8_t num_queues;
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};
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static inline struct dsw_evdev *
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dsw_pmd_priv(const struct rte_eventdev *eventdev)
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{
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return eventdev->data->dev_private;
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}
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#endif
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