net/bnx2x: use I/O device memory read/write API
Replace the raw I/O device memory read/write access with eal abstraction for I/O device memory read/write access to fix portability issues across different architectures. CC: Harish Patil <harish.patil@cavium.com> CC: Rasesh Mody <rasesh.mody@cavium.com> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
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@ -18,6 +18,7 @@
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#include <rte_byteorder.h>
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#include <rte_spinlock.h>
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#include <rte_io.h>
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#if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
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#ifndef __LITTLE_ENDIAN
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@ -1419,8 +1420,7 @@ bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val)
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{
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x",
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(unsigned long)offset, val);
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*((volatile uint8_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
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rte_write8(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
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}
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static inline void
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@ -1433,8 +1433,8 @@ bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val)
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#endif
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%04x",
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(unsigned long)offset, val);
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*((volatile uint16_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
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rte_write16(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
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}
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static inline void
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@ -1448,8 +1448,7 @@ bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val)
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
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(unsigned long)offset, val);
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*((volatile uint32_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)) = val;
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rte_write32(val, ((uint8_t *)sc->bar[BAR0].base_addr + offset));
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}
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static inline uint8_t
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@ -1457,8 +1456,7 @@ bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset)
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{
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uint8_t val;
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val = (uint8_t)(*((volatile uint8_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)));
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val = rte_read8((uint8_t *)sc->bar[BAR0].base_addr + offset);
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%02x",
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(unsigned long)offset, val);
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@ -1476,8 +1474,7 @@ bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset)
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(unsigned long)offset);
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#endif
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val = (uint16_t)(*((volatile uint16_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)));
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val = rte_read16(((uint8_t *)sc->bar[BAR0].base_addr + offset));
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
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(unsigned long)offset, val);
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@ -1495,8 +1492,7 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
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(unsigned long)offset);
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#endif
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val = (uint32_t)(*((volatile uint32_t*)
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((uintptr_t)sc->bar[BAR0].base_addr + offset)));
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val = rte_read32(((uint8_t *)sc->bar[BAR0].base_addr + offset));
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PMD_DEBUG_PERIODIC_LOG(DEBUG, "offset=0x%08lx val=0x%08x",
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(unsigned long)offset, val);
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@ -1560,11 +1556,9 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset)
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#define DPM_TRIGGER_TYPE 0x40
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/* Doorbell macro */
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#define BNX2X_DB_WRITE(db_bar, val) \
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*((volatile uint32_t *)(db_bar)) = (val)
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#define BNX2X_DB_WRITE(db_bar, val) rte_write32_relaxed((val), (db_bar))
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#define BNX2X_DB_READ(db_bar) \
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*((volatile uint32_t *)(db_bar))
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#define BNX2X_DB_READ(db_bar) rte_read32_relaxed(db_bar)
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#define DOORBELL_ADDR(sc, offset) \
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(volatile uint32_t *)(((char *)(sc)->bar[BAR1].base_addr + (offset)))
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